Emit thumb code on VEX V5 - #158762
Conversation
|
Some changes occurred in src/doc/rustc/src/platform-support cc @Noratrieb These commits modify compiler targets. |
|
r? @Kivooeo rustbot has assigned @Kivooeo. Use Why was this reviewer chosen?The reviewer was selected based on:
|
|
A job failed! Check out the build log: (web) (plain enhanced) (plain) Click to see the possible cause of the failure (guessed by this bot) |
|
|
||
| **Tier: 3** | ||
|
|
||
| Allows compiling user programs for the [VEX V5 Brain](https://www.vexrobotics.com/276-4810.html), a microcontroller for educational and competitive robotics. | ||
|
|
||
| Rust support for this target is not affiliated with VEX Robotics or IFI, and does not link against any official VEX SDK. | ||
|
|
||
| This target was previously named `armv7a-vex-v5`. |
There was a problem hiding this comment.
Not a blocker, but it might be a good idea for this to be elaborated on wrt. why we changed to thumb.
|
@rustbot reroll (don't know anything about this targets and don't have bandwidth to figure it out) |
|
There was a problem hiding this comment.
Thanks. Given that this is a Tier 3 target and target maintainers are on board I'm happy to stamp this.
@bors r+ rollup
Emit thumb code on VEX V5 This PR switches the default codegen for the VEX V5 target to emit Thumb-2 instructions, allowing for smaller binary sizes (on the programs I tested this change on, I saw a ~20% size decrease on average). The target is renamed to have the `thumb` prefix instead of the `arm` prefix because of the updated instruction set. Since VEXos starts all programs in Arm32 mode, the program entrypoint is explicitly compiled as ARM code and now transitions to Thumb mode when calling `_start`. Users can still use the updated target in Arm32 mode by specifying `-Ctarget-feature=-thumb-mode`. cc @tropicaaal @Gavin-Niederman
…uwer Rollup of 25 pull requests Successful merges: - #154585 (treat no_mangle_generic_items as hard error instead of lint warning) - #158147 (std: fix stack buffer overflow in Windows junction_point) - #160130 (Select cache values to verify by key fingerprint, not value fingerprint) - #160343 (Rename `OutlivesPredicate` to `OutlivesClause`) - #160360 (Remove rustc_middle dependency on rustc_hir_pretty) - #160387 (rustc_codegen_ssa: Correctly apply the static `--jobs-backend` limit to backend parallelism) - #160422 (move mir-opt miri tests to CI logic) - #160444 (Avoid resolving path keywords outside `TypeNS`) - #160510 (Resolver: (un)tracked borrows for `CmRefCell` made safe my unsafe speculative flag) - #155424 ([blocked] Link to proposed LLM policy in CONTRIBUTING and pull request template) - #158726 (std: move futex implementations into sys::sync::futex) - #158762 (Emit thumb code on VEX V5) - #159225 (Split IncrCompSession out of Session) - #159820 (Make the `rustc_unsafe_specialization_marker` attribute actually `unsafe`) - #160198 (Rework `smallest_range_containing` to handle duplicates) - #160362 (Split `SpannedTypeVisitor` into its own crate, `rustc_ty_walk`) - #160390 (autodiff: Handle slice-tailed DSTs in type trees) - #160420 (Suggest `cast_signed()` for overflowing signed integer literals) - #160516 (Add regression test for HRTB projection in closure) - #160520 (Add some tests for specialization) - #160522 (fix(bootstrap): Normalize the names of proc macro dependency crates) - #160523 (Add regression test for opaque type) - #160531 (docs: fix typo in AllowExprMetavar comment) - #160538 (Update expect messages in tcp.rs doc examples to follow the style guide) - #160548 (bootstrap: Register `coverage-map` and `coverage-run` aliases via a separate step)
Emit thumb code on VEX V5 This PR switches the default codegen for the VEX V5 target to emit Thumb-2 instructions, allowing for smaller binary sizes (on the programs I tested this change on, I saw a ~20% size decrease on average). The target is renamed to have the `thumb` prefix instead of the `arm` prefix because of the updated instruction set. Since VEXos starts all programs in Arm32 mode, the program entrypoint is explicitly compiled as ARM code and now transitions to Thumb mode when calling `_start`. Users can still use the updated target in Arm32 mode by specifying `-Ctarget-feature=-thumb-mode`. cc @tropicaaal @Gavin-Niederman
…uwer Rollup of 25 pull requests Successful merges: - #158147 (std: fix stack buffer overflow in Windows junction_point) - #160130 (Select cache values to verify by key fingerprint, not value fingerprint) - #160343 (Rename `OutlivesPredicate` to `OutlivesClause`) - #160360 (Remove rustc_middle dependency on rustc_hir_pretty) - #160387 (rustc_codegen_ssa: Correctly apply the static `--jobs-backend` limit to backend parallelism) - #160422 (move mir-opt miri tests to CI logic) - #160444 (Avoid resolving path keywords outside `TypeNS`) - #160510 (Resolver: (un)tracked borrows for `CmRefCell` made safe by unsafe speculative flag) - #155424 ([blocked] Link to proposed LLM policy in CONTRIBUTING and pull request template) - #158726 (std: move futex implementations into sys::sync::futex) - #158762 (Emit thumb code on VEX V5) - #159225 (Split IncrCompSession out of Session) - #159820 (Make the `rustc_unsafe_specialization_marker` attribute actually `unsafe`) - #160198 (Rework `smallest_range_containing` to handle duplicates) - #160362 (Split `SpannedTypeVisitor` into its own crate, `rustc_ty_walk`) - #160390 (autodiff: Handle slice-tailed DSTs in type trees) - #160420 (Suggest `cast_signed()` for overflowing signed integer literals) - #160501 (Add bootstrap CLI snapshot test for testing miri) - #160516 (Add regression test for HRTB projection in closure) - #160520 (Add some tests for specialization) - #160522 (fix(bootstrap): Normalize the names of proc macro dependency crates) - #160523 (Add regression test for opaque type) - #160531 (docs: fix typo in AllowExprMetavar comment) - #160538 (Update expect messages in tcp.rs doc examples to follow the style guide) - #160548 (bootstrap: Register `coverage-map` and `coverage-run` aliases via a separate step)
This PR switches the default codegen for the VEX V5 target to emit Thumb-2 instructions, allowing for smaller binary sizes (on the programs I tested this change on, I saw a ~20% size decrease on average). The target is renamed to have the
thumbprefix instead of thearmprefix because of the updated instruction set.Since VEXos starts all programs in Arm32 mode, the program entrypoint is explicitly compiled as ARM code and now transitions to Thumb mode when calling
_start.Users can still use the updated target in Arm32 mode by specifying
-Ctarget-feature=-thumb-mode.cc @tropicaaal @Gavin-Niederman