Assertion failed 'genIsValidDoubleReg(regRec->regNum)' #53322
Description
Test: JIT/SIMD/VectorConvert_ro_Target_32Bit/VectorConvert_ro_Target_32Bit.sh
Linux/arm
JitStress2 + JitStressRegs1/JitStressRegs8
Assert failure(PID 928 [0x000003a0], Thread: 928 [0x03a0]): Assertion failed 'genIsValidDoubleReg(regRec->regNum)' in 'VectorConvertTest:VectorConvertDoubleSingle(System.Numerics.Vector1[Double],System.Numerics.Vector1[Double]):int' during 'LSRA build intervals' (IL size 477)
File: /__w/1/s/src/coreclr/jit/lsra.cpp Line: 3827
Image: /root/helix/work/correlation/corerun
/root/helix/work/workitem/JIT/SIMD/VectorConvert_ro_Target_32Bit/VectorConvert_ro_Target_32Bit.sh: line 379: 928 Aborted (core dumped) $LAUNCHER $ExePath "${CLRTestExecutionArguments[@]}"
Return code: 1
Raw output file: /root/helix/work/workitem/JIT/SIMD/Reports/JIT.SIMD/VectorConvert_ro_Target_32Bit/VectorConvert_ro_Target_32Bit.output.txt
Raw output:
BEGIN EXECUTION
/root/helix/work/correlation/corerun VectorConvert_ro_Target_32Bit.dll ''
Gathering state for process 928 corerun
Writing minidump with heap to file /home/helixbot/dotnetbuild/dumps/coredump.928.dmp
Written 51810304 bytes (12649 pages) to core file
Dump successfully written
Expected: 100
Actual: 134
END EXECUTION - FAILED
Test Harness Exitcode is : 1
To run the test:
set CORE_ROOT=/root/helix/work/correlation
/root/helix/work/workitem/JIT/SIMD/VectorConvert_ro_Target_32Bit/VectorConvert_ro_Target_32Bit.sh
Expected: True
Actual: False
fwiw, the failure occurred after this LSRA change: #52832
@kunalspathak PTAL
cc @dotnet/jit-contrib