perf(decode): hot-loop register-pressure trims + release-plz concurrency guard#452
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Two PRs merged back-to-back start two overlapping release-plz runs that race on the release-PR git refs: one closes the release PR while the other's recreate fails on the already-taken ref, leaving it closed with no replacement. Add a concurrency group so a second run queues behind the first; cancel-in-progress stays false so the publish step is never interrupted.
Two byte-identical op-reductions in the AVX2 sequence decoder, both perf-neutral on z000033 L1 (verified by perf stat instructions on i9; criterion without a c_ffi control arm gave false regressions): read OF/ML/LL as three separate pipelined reads instead of one serial PEXT-triple in the long-pipeline arm, and advance the FSE states before executing the current sequence in the short arm (mirrors upstream ZSTD_decodeSequence; the execute reads no bits so the order is byte-identical) to stop the states living across the match copy.
The four per-stream sub-byte phases were written every reload but read only at burst writeback, where trailing_zeros of the just-reloaded register recovers the same value. Recompute it there instead of carrying four registers across the burst. Instruction-identical (the optimiser already folded it), byte-identical.
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Summary
Three independent, low-risk changes from the level-1
decodecorpusdecodeinvestigation:
ci(release)— serialize release-plz runs with aconcurrencygroup.Two PRs merged back-to-back start two overlapping release-plz runs that race on
the release-PR git refs; one closes the release PR while the other's recreate
fails on the already-taken ref, leaving it closed with no replacement (this
happened during the work that led to this branch).
cancel-in-progressstaysfalseso the publish step is never interrupted mid-run.perf(decode)— sequence loop — read OF/ML/LL as three separate pipelinedreads instead of one serial PEXT-triple (long-pipeline arm), and advance the
FSE states before executing the current sequence (short arm, mirrors upstream
ZSTD_decodeSequence; the execute reads no bits so the reorder isbyte-identical).
perf(decode)— HUF burst — drop the four carried per-stream sub-bytephase registers; recompute the value from
trailing_zerosof thejust-reloaded register at burst writeback.
Both decode changes are byte-identical and perf-neutral — kept as valid
register-pressure / op-count reductions, not as measured wins.
Why perf-neutral, not regressions
The investigation's main finding: the level-1 decode gap vs the C reference is
instruction count (≈1.23×, ≈ the cycle ratio), spread across the decoder
(the sequence decoder is the largest share). That is the cost of a memory-safe
pure-Rust decoder (bounds checks,
Resultplumbing) plus the absence of ahand-tuned assembly HUF loop — not a missed optimisation in any single kernel. A
standalone
global_asm!HUF burst was prototyped and measured across threeregister layouts; it cut instruction count but did not beat the LLVM-scheduled
Rust burst on cycles (lower IPC), so it was dropped. These neutral op-reductions
are the parts of that work that are strictly-better constructions.
Methodology note: per-change deltas were measured with
perf stat -e instructions(deterministic) and-e cyclesunder low load on a dedicated host.Criterion on these fast small-frame fixtures without a matched control arm
produced false ±2-4% "regressions" (scheduler noise); those are not real.
Testing
cargo nextest run -p structured-zstd— full suite green (819 tests),including the 1000-iteration random round-trip.
decodecorpuscorpus (round-trip + length +checksum).
The
ci(release)change is independent and can be merged first if the releasetooling needs it sooner.