Test thumbv8m.base on Travis CI#168
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Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @ithinuel (or someone else) soon. If any changes to this PR are deemed necessary, please add them as extra commits. This ensures that the reviewer can see what has changed since they last reviewed the code. Due to the way GitHub handles out-of-date commits, this should also make it reasonably obvious what issues have or haven't been addressed. Large or tricky changes may require several passes of review and changes. Please see the contribution instructions for more information. |
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Hi, I have approved #167 for merge, when it lands I will merge this too to have base type CIed as well. |
korken89
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Oct 29, 2019
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bors r+ |
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adamgreig
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Jan 12, 2022
168: On HardFault entry use MSP/PSP depending on stack mode r=thejpster a=bytex64 Noticed this when making my own hardfault handler - none of the registers were correct. The `&ExceptionFrame` argument was wrong because I was using the PSP in Thread mode, but the handler only loads MSP. This PR inspects the EXC_RETURN value in LR and loads either MSP or PSP depending on the stack used (see section B1.5.8 in the ARMv7-M architecture manual for details on the format of EXC_RETURN). I haven't tested this on armv6m or armv8m, but I believe it works the same across the board. Also didn't update the libraries in `bin/` since I wasn't sure if that was expected or not. Co-authored-by: Chip <bytex64@bytex64.net>
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This will fail until #155 is resolved