Arm backend: Fix two control flow bugs#16274
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zingo merged 2 commits intopytorch:mainfrom Dec 16, 2025
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Add a function _regularize_submodule that contains special handling needed for submodules. This mainly solves two problems: - Buffers in submodules are (currently) handled differently depending on whether they are from tracing or added in passes. The old solution tried avoiding having to add a new meta field, but was brittle. The new solution simply marks all all placeholders before passes. - The pass pipeline assumes the dim_order of inputs and outputs to match the actual dim_order (tosa_dim_order). We need to ensure this. Signed-off-by: Erik Lundell <erik.lundell@arm.com> Change-Id: I606332945a6c23767cce36e4b567785659b55d30
The output of the while loop body can either re-enter the body, or exit the while loop. Therefore, A and B in the diagrambelow need to share the same quantization parameters. A -> while ( RESCALE -> ... -> RESCALE -> ) -> B Earlier tests happened to get equal qparams on the input and output, but this is not the general case. Signed-off-by: Erik Lundell <erik.lundell@arm.com> Change-Id: Icc5088f27c6ca0ec6bd06efb440b01fa4df1c022
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/16274
Note: Links to docs will display an error until the docs builds have been completed. ❌ 4 New Failures, 1 Unrelated FailureAs of commit 4401fbb with merge base 1cb85ef ( NEW FAILURES - The following jobs have failed:
UNSTABLE - The following job is marked as unstable, possibly due to flakiness on trunk:
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Failures unrelated. Should be a safe merge. |
zingo
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Dec 16, 2025
xingguo01
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Dec 18, 2025
Arm backend: Regularize submodules before processing them.
Add a function _regularize_submodule that contains special
handling needed for submodules. This mainly solves two problems:
- Buffers in submodules are (currently) handled differently depending
on whether they are from tracing or added in passes. The old solution
tried avoiding having to add a new meta field, but was brittle.
The new solution simply marks all all placeholders before passes.
- The pass pipeline assumes the dim_order of inputs and outputs to match
the actual dim_order (tosa_dim_order). We need to ensure this.
------------------------
Arm backend: Fix while quantization
The output of the while loop body can either re-enter
the body, or exit the while loop. Therefore, A and B
in the diagrambelow need to share the same quantization parameters.
A -> while ( RESCALE -> ... -> RESCALE -> ) -> B
Earlier tests happened to get equal qparams on the
input and output, but this is not the general case.
Signed-off-by: Erik Lundell <erik.lundell@arm.com>
jirioc
pushed a commit
to nxp-upstream/executorch
that referenced
this pull request
Dec 19, 2025
Arm backend: Regularize submodules before processing them.
Add a function _regularize_submodule that contains special
handling needed for submodules. This mainly solves two problems:
- Buffers in submodules are (currently) handled differently depending
on whether they are from tracing or added in passes. The old solution
tried avoiding having to add a new meta field, but was brittle.
The new solution simply marks all all placeholders before passes.
- The pass pipeline assumes the dim_order of inputs and outputs to match
the actual dim_order (tosa_dim_order). We need to ensure this.
------------------------
Arm backend: Fix while quantization
The output of the while loop body can either re-enter
the body, or exit the while loop. Therefore, A and B
in the diagrambelow need to share the same quantization parameters.
A -> while ( RESCALE -> ... -> RESCALE -> ) -> B
Earlier tests happened to get equal qparams on the
input and output, but this is not the general case.
Signed-off-by: Erik Lundell <erik.lundell@arm.com>
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cc @freddan80 @per @zingo @oscarandersson8218 @digantdesai