(AI policy violation) Metal: TurboQuant GPU dequant kernels + host buffer type#21818
(AI policy violation) Metal: TurboQuant GPU dequant kernels + host buffer type#21818sachmans wants to merge 7 commits into
Conversation
Replace scalar/AVX2 matrix-vector multiply in TurboQuant rotation with cblas_sgemv from Apple's Accelerate framework. This uses the AMX coprocessor on Apple Silicon for the 128x128 dense rotation matrix multiply during dequantization. Results on Mac Studio M3 Ultra, Qwen3-32B Q4_K_M: TBQ4_0 K + F16 V: 7.40 → 14.00 t/s (1.89x faster, 86% of F16) TBQ4_0 K + TBQ4_0 V: 5.32 → 11.04 t/s (2.07x faster, 67% of F16) Quality unchanged (PPL within noise margin).
After inverse rotation, re-normalize the reconstructed unit vector to unit length before scaling by the original norm. This removes magnitude bias from codebook quantization error. Results on Qwen3-32B Q4_K_M (PPL, lower is better): TBQ4_0 K+V: 2.751 → 2.733 (+1.3% → +0.6% vs F16) TBQ4_0 K+F16 V: 2.733 → 2.724 (+0.6% → +0.3% vs F16) TBQ4_0 K+TBQ3_0 V: 2.767 → 2.730 (+1.9% → +0.5% vs F16) 4.5x compression at +0.5% quality loss (TBQ4_0 K + TBQ3_0 V).
Add comprehensive benchmark section covering: - PPL comparison (F16, Q8_0, Q4_0, TBQ4_0, TBQ3_0) - Speed benchmarks (18% overhead noted) - Max context length across 4 models (8B to 72B) - Usage examples, known limitations, and roadmap - Link to experimental/qjl-error-correction branch
Stage 1: Metal compute kernels for TBQ3_0/TBQ4_0 → F16/F32 dequant (CPY op). Applies inverse Householder QR rotation and Lloyd-Max codebook lookup on GPU. Includes baked 128×128 rotation matrix in ggml-metal-turboq-rot.h. Stage 2: New Metal "host" buffer type (MTL0_Host) backed by shared-storage MTLBuffer with is_host=true. KV cache tensors allocated here are accessible by both Metal backend (GPU dequant via CPY) and CPU backend (SET_ROWS for F32→TBQ quantize). The ggml scheduler routes each op to the appropriate backend automatically. KV cache allocation updated to use host buffer type for TBQ types when available, falling back to CPU buffer otherwise. Benchmarks (Gemma 3 4B Q4_K_M, Mac Studio M3 Ultra): - TBQ4_0+TBQ3_0 K+V: 4.49× KV compression, coherent output verified - Metal host buft confirmed active (MTL0_Host in load logs) Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
|
Hi @sachmans, thanks for your contribution! Per our contribution guidelines, the automated PR checker found the following issue(s) that need your attention:
Please note that maintainers reserve the right to make final decisions on PRs. If you believe there is a mistake, please comment below. |
This violates the AI Usage Policy as stated in CONTRIBUTING.md:
|
|
I believe this account should be banned if they continue to violate project's policy. |
Summary
Adds Metal GPU support for TurboQuant KV cache types (TBQ3_0/TBQ4_0) on Apple Silicon. Two components:
Stage 1: Metal dequant kernels
GGML_OP_CPYkernel_cpy_tbq{3,4}_0_{f16,f32}Stage 2: Metal host buffer type (
MTL0_Host)MTLBufferthat reportsis_host = trueggml_backend_cuda_host_buffer_type()(pinned host memory)Architecture
This avoids needing a Metal SET_ROWS (forward rotation + quantize) kernel, which would be significantly more complex.
Benchmark results (Gemma 3 4B Q4_K_M, Mac Studio M3 Ultra)
Memory (KV cache @ 8K context)
Accuracy verification (Gemma 3 4B, greedy decoding)
All configs (f16, tbq4_0, tbq3_0, tbq4_0+tbq4_0) produce correct factual answers ("The three primary colors are red, yellow, and blue") with coherent elaboration. TBQ matches F16 baseline quality.
Files changed
ggml/src/ggml-metal/ggml-metal.metal— TBQ dequant kernel implementationsggml/src/ggml-metal/ggml-metal-turboq-rot.h— Baked 128×128 Householder rotation matrixggml/src/ggml-metal/ggml-metal.cpp— Host buffer type + device callbackggml/src/ggml-metal/ggml-metal-ops.cpp— TBQ CPY dispatchggml/src/ggml-metal/ggml-metal-device.m— TBQ op whitelistggml/src/ggml-metal/CMakeLists.txt— Header inclusionsrc/llama-kv-cache.cpp— Host buft routing for TBQ typesTest plan
MTL0_Host(not CPU fallback)Depends on: #21089
🤖 Generated with Claude Code