Improve RA for LowerBlockStore

[EgorBo]

This PR does two things:

1. getUnrollThreshold was always invoked with /*canUseSimd*/ false so the threshold was 128b instead of 256b for x64
2. We don't need int register if we can init the whole thing via SIMD

An example for 2nd:

struct MyStruct
{
    public fixed byte Data[30];
}

MyStruct Test() => new MyStruct();

; Method Test():Program+MyStruct:this
G_M45940_IG01:              
       4883EC38             sub      rsp, 56
       C5F877               vzeroupper 
       48B878563412F0DEBC9A mov      rax, 0x9ABCDEF012345678
       4889442430           mov      qword ptr [rsp+30H], rax
G_M45940_IG02:              
-      33C0                 xor      eax, eax  ;; we don't use RAX to zero the struct
       C5F857C0             vxorps   xmm0, xmm0
       C5FA7F02             vmovdqu  xmmword ptr [rdx], xmm0
       C5FA7F420E           vmovdqu  xmmword ptr [rdx+0EH], xmm0   ;; overlapped with previous mov
       488BC2               mov      rax, rdx
       48B978563412F0DEBC9A mov      rcx, 0x9ABCDEF012345678
       48394C2430           cmp      qword ptr [rsp+30H], rcx
       7405                 je       SHORT G_M45940_IG03
       E8C2CB4B5F           call     CORINFO_HELP_FAIL_FAST
G_M45940_IG03:              
       90                   nop      
G_M45940_IG04:              
       4883C438             add      rsp, 56
       C3                   ret      
-; Total bytes of code: 68
+; Total bytes of code: 66

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Issue Details

---

This PR does two things:

1. getUnrollThreshold was always invoked with /*canUseSimd*/ false so the threshold was 128b instead of 256b for x64
2. We don't need int register if we can init the whole thing via SIMD

An example for 2nd:

struct MyStruct
{
    public fixed byte Data[30]; // and other sizes
}

MyStruct InitMemory() => new MyStruct();

; Method Program:InitMemory():Program+MyStruct:this
G_M45940_IG01:              
       4883EC38             sub      rsp, 56
       C5F877               vzeroupper 
       48B878563412F0DEBC9A mov      rax, 0x9ABCDEF012345678
       4889442430           mov      qword ptr [rsp+30H], rax
G_M45940_IG02:              
-      33C0                 xor      eax, eax
       C5F857C0             vxorps   xmm0, xmm0
       C5FA7F02             vmovdqu  xmmword ptr [rdx], xmm0
       C5FA7F420E           vmovdqu  xmmword ptr [rdx+0EH], xmm0
       488BC2               mov      rax, rdx
       48B978563412F0DEBC9A mov      rcx, 0x9ABCDEF012345678
       48394C2430           cmp      qword ptr [rsp+30H], rcx
       7405                 je       SHORT G_M45940_IG03
       E8C2CB4B5F           call     CORINFO_HELP_FAIL_FAST
G_M45940_IG03:              
       90                   nop      
G_M45940_IG04:              
       4883C438             add      rsp, 56
       C3                   ret      
-; Total bytes of code: 68
+; Total bytes of code: 66

Author:	EgorBo
Assignees:	-
Labels:	area-CodeGen-coreclr
Milestone:	-

[EgorBo]

@TIHan @dotnet/jit-contrib PTAL

Diffs

Size regressions are due to unrolled memset, e.g.

-       xor      edx, edx
-       lea      rcx, bword ptr [rsp+38H]
-       ; byrRegs +[rcx]
-       mov      r8d, 152
-       call     CORINFO_HELP_MEMSET
-       ; byrRegs -[rcx]
-       ; gcr arg pop 0
        xor      r9d, r9d
+       vxorps   ymm0, ymm0
+       vmovdqu  ymmword ptr[rsp+38H], ymm0
+       vmovdqu  ymmword ptr[rsp+58H], ymm0
+       vmovdqu  ymmword ptr[rsp+78H], ymm0
+       vmovdqu  ymmword ptr[rsp+98H], ymm0
+       vmovdqu  ymmword ptr[rsp+B0H], ymm0
        mov      dword ptr [rsp+20H], r9d
        mov      dword ptr [rsp+28H], r9d

[TIHan]

The regressions make sense. LGTM.