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[wasm] Bail R2R for SIMD16 store-indirect and SIMD16 parameters #130101

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AndyAyersMS merged 1 commit into from
Jul 2, 2026
+21 −2
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[wasm] Bail R2R for SIMD16 store-indirect and SIMD16 parameters #130101

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23 changes: 21 additions & 2 deletions src/coreclr/jit/codegenwasm.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -105,6 +105,18 @@ void CodeGen::genMarkLabelsForCodegen()
//
void CodeGen::genBeginFnProlog()
{
// SIMD16 (Vector128) parameters are lowered to i32 in the wasm signature, so any
// v128 operation performed on them produces an invalid module (e.g. a v128 op with
// an i32 operand). Bail such methods to the interpreter until SIMD16 parameters are
// properly supported in the wasm calling convention.
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for (unsigned lclNum = 0; lclNum < m_compiler->info.compArgsCount; lclNum++)
{
if (m_compiler->lvaGetDesc(lclNum)->TypeGet() == TYP_SIMD16)
{
NYI_WASM_SIMD("SIMD16 parameter");
}
}

GetEmitter()->emitIns(INS_code_size);

FuncInfoDsc* const func = m_compiler->funGetFunc(ROOT_FUNC_IDX);
Expand Down Expand Up @@ -2748,8 +2760,15 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
}
else // A normal store, not a WriteBarrier store
{
var_types type = tree->TypeGet();
instruction ins = ins_Store(type);
var_types type = tree->TypeGet();
if (type == TYP_SIMD16)
{
// Storing a SIMD16 value emits v128.store, but the data operand is not
// materialized as a v128 (it comes through as an i32), producing an invalid
// module. Bail until SIMD16 store is properly supported.
NYI_WASM_SIMD("SIMD16 store indirect");
}
instruction ins = ins_Store(type);

// TODO-WASM: Memory barriers

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