Remove Wrapper delegate kind, switch ARM32 VSD hidden arg to R12

[Copilot]

main PR

Description

CoreCLR’s Wrapper delegate kind was retained only to satisfy an ARM32 VSD ABI quirk (r4 hidden cell). This change removes that special delegate path by moving ARM32 VSD hidden-parameter passing to r12 and deleting wrapper-delegate infrastructure across VM/JIT/AOT/contracts and System.Private.CoreLib.

• ARM32 VSD calling-convention alignment

  • Updates ARM32 stub-dispatch plumbing to carry IndirectionCellAndFlags in r12.
  • Aligns JIT virtual-stub parameter selection on ARM32 to REG_R12.
  • Applies follow-up ARM32 VSD worker handoff fixes:
    • LookupHolder::Initialize and ResolveStub slow-entry push incoming hidden r12 to the stack and load dispatch token into r12 before branching to the worker.
    • ResolveWorkerAsmStub now uses a fake-prolog/transition-block shape (matching the existing ARM delay-load pattern) so argument registers are preserved correctly while passing the dispatch token and hidden cell/flags to VSD_ResolveWorker.
    • Updates ARM stub length constants to match the instruction sequence changes.
  • Post-feedback correctness fixes:
    • Corrects ResolveStub::slowEntryPointLen to match the emitted slow-entry instruction count.
    • Removes unnecessary slow-entry alignment NOP padding and keeps slowEntryPointLen at 6, which is already even and satisfies the subsequent alignment invariant ((n & 1) == 0).

• Wrapper delegate infrastructure removal

  • Removes wrapper-delegate creation/detection/runtime paths from COMDelegate.
  • Removes remaining wrapper handling from MulticastDelegate.CoreCLR.cs.
  • Removes wrapper-specific IL stub kind/plumbing and associated metadata fields.
  • Removes wrapper-specific JIT call flags and late-arg handling.

• Cross-layer contract cleanup

  • Deletes obsolete wrapperDelegateInvoke and offsetOfWrapperDelegateIndirectCell from EE/JIT interfaces and SuperPMI agnostic records.
  • Keeps VM/JIT/AOT call-info structures consistent after field removal.
  • Revs the JIT/EE interface GUID in jiteeversionguid.h to match the interface change.

• IL stub enum cleanup

  • Deletes the unused wrapper IL stub value and renumbers subsequent IL stub values in VM (method.hpp, dllimport.h) and corresponding cDAC contract mapping.

• ARM32 ResolveStub correctness fix

  • Fixes ResolveStub::_failEntryPoint to avoid clobbering r12 (which now carries IndirectionCellAndFlags).
  • Uses r4 as decrement scratch for _pCounter update and preserves callee-saved r4 via stack save/restore in the fail path.

• JIT cleanup after feedback

  • Removes an unused VirtualStubParamInfo constructor argument in src/coreclr/jit/compiler.h.
  • Updates the call site in src/coreclr/jit/compiler.cpp accordingly.
  • Moves GTF_CALL_M_STACK_ARRAY to the removed wrapper-flag slot (0x00004000) so call flag values remain contiguous.

• Delegate VM cleanup after feedback

  • Removes the temporary refRealDelegate local and associated GCPROTECT_BEGIN/END in COMDelegate::BindToMethod.
  • Replaces uses with (*pRefThis) directly.
  • Deletes the unused _ReturnAddress intrinsic declaration from comdelegate.cpp.

• R2R compatibility boundary

  • Bumps ReadyToRun major/minimum version to 24 for the ARM32 VSD register contract change.
  • Syncs version constants across native and managed header definitions.

• Documentation update

  • Updates docs/design/coreclr/botr/clr-abi.md hidden-parameter section: ARM32 VSD hidden parameter is now R12.

// src/coreclr/jit/compiler.h (ARM32)
#elif defined(TARGET_ARM)
    reg     = REG_R12;
    regMask = RBM_R12;

Customer Impact

Without this change, ARM32 virtual stub dispatch can mis-handle hidden argument/token flow in edge paths and wrapper-delegate-specific infrastructure remains in place even though it is no longer needed. This can lead to correctness risk and unnecessary maintenance burden. The slow-entry assertion fixes also prevent ARM checked-build assertion failures in ResolveHolder::Initialize without unnecessary instruction padding.

Regression

No known product regression is being fixed; this is ABI/calling-convention cleanup plus correctness hardening in ARM32 VSD paths. The latest updates fix regressions introduced during this PR’s ARM32 stub reshaping (slow-entry length mismatch and follow-up assertion failures).

Testing

• Baseline build completed: ./build.sh clr+libs+host
• Targeted ARM validation completed: ./build.sh clr.runtime -arch arm -c Release
• Additional ARM build attempt: ./build.sh clr -arch arm -c Release (failed in ILCompiler_publish.csproj due missing libjitinterface_arm.so, unrelated to the ARM32 asm helper change)
• Follow-up validation for assertion fixes: ./build.sh clr.runtime -arch arm -c Checked (passed)

Risk

Medium. The change touches low-level CoreCLR ARM32 stub assembly and calling-convention plumbing, but is narrowly scoped to VSD worker handoff and aligned with existing fake-prolog transition-block patterns used elsewhere in ARM stubs. The final slow-entry fix is low risk and removes unnecessary NOP padding while keeping emitted metadata and alignment invariants correct.

Package authoring no longer needed in .NET 9

IMPORTANT: Starting with .NET 9, you no longer need to edit a NuGet package's csproj to enable building and bump the version.
Keep in mind that we still need package authoring in .NET 8 and older versions.

[MichalPetryka]

@copilot Remove all wrapper handling code from MulticastDelegate.CoreCLR.cs too.

[MichalPetryka]

@copilot Remove all wrapper handling code from MulticastDelegate.CoreCLR.cs too.

@jkotas Can you repost this since only maintainers can interact with copilot?

[jkotas]

@copilot Remove all wrapper handling code from MulticastDelegate.CoreCLR.cs too.

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[Copilot]

Pull request overview

Copilot reviewed 35 out of 35 changed files in this pull request and generated 1 comment.

[jkotas]

@copilot Build failure

Assertion failed.
IsLowReg(destination) && IsLowReg(source)
at ILCompiler.DependencyAnalysis.ReadyToRun.ImportThunk.EmitCode(NodeFactory factory, ARMEmitter& instructionEncoder, Boolean relocsOnly) in /_/src/coreclr/tools/aot/ILCompiler.ReadyToRun/Compiler/DependencyAnalysis/ReadyToRun/Target_ARM/ImportThunk.cs:line 50

[Copilot]

@copilot Build failure

Assertion failed.
...

Fixed in 21e17b1. The issue was that R12 is a high register (R8-R15) and the simple form of EmitLDR requires both source and destination to be low registers (R0-R7). Changed the delay-load/VSD path to use R0 as scratch instead of R12, while keeping R12 for the hidden indirection cell as required by the new ABI.

[jkotas]

@copilot Please revert the last commit. It is wrong fix for the issue. The thunk must not clobber r0 - r3 registers. Instead, fix the instruction encoder to support r12 register as needed.

[Copilot]

@copilot Please revert the last commit. It is wrong fix for the issue. The thunk must not clobber r0 - r3 registers. Instead, fix the instruction encoder to support r12 register as needed.

Reverted in 78e5b3e and fixed the instruction encoder in 1d5ac1c. ARMEmitter.EmitLDR now uses 32-bit encoding with offset 0 for high registers (R8-R15) including R12, while keeping the compact 16-bit encoding for low registers (R0-R7). Build verified successfully.

[Copilot]

Pull request overview

Copilot reviewed 36 out of 36 changed files in this pull request and generated 2 comments.

[jkotas]

@copilot resolveEntryPointLen is odd now, but this assert checks that it is even. Delete the nop for alignment above and adjust resolveEntryPointLen as appropriate

[Copilot]

Fixed in the latest commit: removed the alignment NOP from the slow-entry path of the resolve entry point and updated resolveEntryPointLen from 31 to 30. With the NOP gone the instruction count is 30 (even), satisfying the (n & 1) == 0 assert without needing any padding.