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Merged
simbit18 merged 1 commit into from
Apr 24, 2026
Merged

boards/stm32g4: migrate to new pinmap #18795

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1 change: 1 addition & 0 deletions boards/arm/stm32/b-g474e-dpow1/configs/buckboost/defconfig
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Expand Up @@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
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1 change: 1 addition & 0 deletions boards/arm/stm32/b-g474e-dpow1/configs/nsh/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/b-g474e-dpow1/configs/ostest/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
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7 changes: 7 additions & 0 deletions boards/arm/stm32/b-g474e-dpow1/include/board.h
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Expand Up @@ -246,4 +246,11 @@

#endif /* CONFIG_EXAMPLES_SMPS */

/* HRTIM */

#define GPIO_HRTIM1_CHC1 GPIO_HRTIM1_CHC1_0
#define GPIO_HRTIM1_CHC2 GPIO_HRTIM1_CHC2_0
#define GPIO_HRTIM1_CHD1 GPIO_HRTIM1_CHD1_0
#define GPIO_HRTIM1_CHD2 GPIO_HRTIM1_CHD2_0

#endif /* __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H */
4 changes: 2 additions & 2 deletions boards/arm/stm32/b-g474e-dpow1/src/stm32_smps.c
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Expand Up @@ -308,8 +308,8 @@ static const uint8_t g_adc1chan[ADC1_NCHANNELS] =

static const uint32_t g_adc1pins[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN2, /* PA1 - V_IN */
GPIO_ADC1_IN4, /* PA3 - V_OUT */
GPIO_ADC1_IN2_0, /* PA1 - V_IN */
GPIO_ADC1_IN4_0, /* PA3 - V_OUT */
};

/****************************************************************************
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig
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Expand Up @@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431kb/configs/nsh/defconfig
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Expand Up @@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig
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Expand Up @@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
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2 changes: 1 addition & 1 deletion boards/arm/stm32/nucleo-g431kb/include/board.h
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Expand Up @@ -240,7 +240,7 @@

/* TIM1 PWM */

#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* PA8 */

/* Comparators configuration ************************************************/

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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/adc/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_LIBC_LONG_LONG is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
# CONFIG_SYSTEM_DD is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/can/defconfig
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Expand Up @@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/cansock/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig
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Expand Up @@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/nsh/defconfig
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Expand Up @@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/pwm/defconfig
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Expand Up @@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g431rb/configs/qenco/defconfig
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Expand Up @@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_COMMON=y
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30 changes: 15 additions & 15 deletions boards/arm/stm32/nucleo-g431rb/include/board.h
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Expand Up @@ -320,8 +320,8 @@

/* TIM2 input ***************************************************************/

#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_3 | GPIO_PULLUP) /* PA15 */
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_3 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA15 */
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB3 */

/* USART2 (STLINK Virtual COM Port) */

Expand All @@ -332,18 +332,18 @@

/* TIM1 PWM */

#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_2 /* PA11 */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* PA9 */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_1 /* PA12 */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* PA10 */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3NOUT_1 /* PB1 */
#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 /* PC3 */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* PA8 */
#define GPIO_TIM1_CH1NOUT (GPIO_TIM1_CH1NOUT_2|GPIO_SPEED_50MHz) /* PA11 */
#define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* PA9 */
#define GPIO_TIM1_CH2NOUT (GPIO_TIM1_CH2NOUT_1|GPIO_SPEED_50MHz) /* PA12 */
#define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* PA10 */
#define GPIO_TIM1_CH3NOUT (GPIO_TIM1_CH3NOUT_1|GPIO_SPEED_50MHz) /* PB1 */
#define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_2|GPIO_SPEED_50MHz) /* PC3 */

/* CAN configuration ********************************************************/

#define GPIO_FDCAN1_RX GPIO_FDCAN1_RX_2 /* PB8 */
#define GPIO_FDCAN1_TX GPIO_FDCAN1_TX_2 /* PB9 */
#define GPIO_FDCAN1_RX (GPIO_FDCAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_FDCAN1_TX (GPIO_FDCAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */

/* DMA channels *************************************************************/

Expand All @@ -364,10 +364,10 @@

/* TIM1 configuration *******************************************************/

# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* TIM1 CH1 - PA8 - U high */
# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* TIM1 CH2 - PA9 - V high */
# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* TIM1 CH3 - PA10 - W high */
# define GPIO_TIM1_CH4OUT 0 /* not used as output */
# define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH1 - PA8 - U high */
# define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH2 - PA9 - V high */
# define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH3 - PA10 - W high */
# define GPIO_TIM1_CH4OUT 0 /* not used as output */

/* UVW ENABLE */

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18 changes: 9 additions & 9 deletions boards/arm/stm32/nucleo-g431rb/src/stm32_adc.c
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Expand Up @@ -89,9 +89,9 @@ static const uint8_t g_chanlist1[3] =

static const uint32_t g_pinlist1[3] =
{
GPIO_ADC1_IN1, /* PA0/A0 */
GPIO_ADC1_IN2, /* PA1/A1 */
GPIO_ADC1_IN15, /* PB0/A3 */
GPIO_ADC1_IN1_0, /* PA0/A0 */
GPIO_ADC1_IN2_0, /* PA1/A1 */
GPIO_ADC1_IN15_0, /* PB0/A3 */
};

#elif DEV1_PORT == 2
Expand All @@ -111,9 +111,9 @@ static const uint8_t g_chanlist1[3] =

static const uint32_t g_pinlist1[3] =
{
GPIO_ADC2_IN17, /* PA4/A2 */
GPIO_ADC2_IN7, /* PC1/A4 */
GPIO_ADC2_IN6, /* PC0/A5 */
GPIO_ADC2_IN17_0, /* PA4/A2 */
GPIO_ADC2_IN7_0, /* PC1/A4 */
GPIO_ADC2_IN6_0, /* PC0/A5 */
};

#endif /* DEV1_PORT == 1 */
Expand All @@ -139,9 +139,9 @@ static const uint8_t g_chanlist2[3] =

static const uint32_t g_pinlist2[3] =
{
GPIO_ADC2_IN17, /* PA4/A2 */
GPIO_ADC2_IN7, /* PC1/A4 */
GPIO_ADC2_IN6, /* PC0/A5 */
GPIO_ADC2_IN17_0, /* PA4/A2 */
GPIO_ADC2_IN7_0, /* PC1/A4 */
GPIO_ADC2_IN6_0, /* PC0/A5 */
};

#endif /* DEV2_PORT == 2 */
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10 changes: 5 additions & 5 deletions boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c
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Expand Up @@ -102,17 +102,17 @@ static uint8_t g_adc1_chan[] =
static uint32_t g_adc1_pins[] =
{
#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
GPIO_ADC1_IN1,
GPIO_ADC1_IN1_0,
#endif
#ifdef CONFIG_BOARD_STM32_IHM16M1_POT
GPIO_ADC1_IN8,
GPIO_ADC1_IN8_0,
#endif
GPIO_ADC1_IN2,
GPIO_ADC1_IN2_0,
#if CONFIG_MOTOR_FOC_SHUNTS > 1
GPIO_ADC1_IN12,
GPIO_ADC1_IN12_0,
#endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2
GPIO_ADC1_IN15,
GPIO_ADC1_IN15_0,
#endif
};

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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g474re/configs/lpuartnsh/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g474re/configs/nsh/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-g474re/configs/usbserial/defconfig
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Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g474re"
CONFIG_ARCH_BOARD_NUCLEO_G474RE=y
Expand Down
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