[HELP] Compilation Failure for ADC Example on Nucleo-H743ZI

[comejv]

Description

When attempting to compile the apps/examples/adc application for the nucleo-h743zi board, the build fails with "undeclared" errors for specific ADC GPIO pin definitions (e.g., GPIO_ADC12_INP5, GPIO_ADC123_INP10, GPIO_ADC123_INP12, GPIO_ADC12_INP13, GPIO_ADC12_INP15) within boards/arm/stm32h7/nucleo-h743zi/src/stm32_adc.c:

nuttx/boards/arm/stm32h7/nucleo-h743zi/src/stm32_adc.c:86:3: error: 'GPIO_ADC12_INP5' undeclared here (not in a function); did you mean 'GPIO_ADC12_INP5_0'?
   86 |   GPIO_ADC12_INP5,
      |   ^~~~~~~~~~~~~~~
      |   GPIO_ADC12_INP5_0
[...]

When I added these lines to boards/arm/stm32h7/nucleo-h743zi/include/board.h it compiled:

/* ADC */

#define GPIO_ADC12_INP5   (GPIO_ADC12_INP5_0 | GPIO_SPEED_50MHz)
#define GPIO_ADC123_INP10 (GPIO_ADC123_INP10_0 | GPIO_SPEED_50MHz)
#define GPIO_ADC123_INP12 (GPIO_ADC123_INP12_0 | GPIO_SPEED_50MHz)
#define GPIO_ADC12_INP13  (GPIO_ADC12_INP13_0 | GPIO_SPEED_50MHz)
#define GPIO_ADC12_INP15  (GPIO_ADC12_INP15_0 | GPIO_SPEED_50MHz)

But I'm not seeing any change in values when running adc in nsh and sending waveforms in the ADC_IN headers.

My defconfig:
defconfig.txt

Any idea?

Thanks,
Côme

Verification

• I have verified before submitting the report.

[comejv]

When doing the quick fix I have to enable software triggers otherwise the example is stuck on the first read.

[raiden00pl]

When doing the quick fix I have to enable software triggers otherwise the example is stuck on the first read.

this is correct behavior. Your defconfig doesn't have any external trigger enabled, so the ADC doesn't start sampling.

Regarding pins definitions, you can just set:

#define GPIO_ADC12_INP5   (GPIO_ADC12_INP5_0)
#define GPIO_ADC123_INP10 (GPIO_ADC123_INP10_0)
#define GPIO_ADC123_INP12 (GPIO_ADC123_INP12_0)
#define GPIO_ADC12_INP13  (GPIO_ADC12_INP13_0)
#define GPIO_ADC12_INP15  (GPIO_ADC12_INP15_0)

it's required for boards that has the CONFIG_STM32H7_USE_LEGACY_PINMAP option not set.

[comejv]

Ok! So all intended behavior? Any idea why I'm not seeing variation on the adc then? I'm sending signals to the ADC_IN female headers of my nucleo.

[raiden00pl]

try this commit: raiden00pl@083c131
This is minimal configuration for adc example. I only tested it for channels 5 and 12 with GND and 3V3 but it seems to work.

[comejv]

I found my issue, it wasn't configuration but using the wrong headers. I was sending voltage to ADC_IN without succes but sending voltage to A1-A5 gives me results!

Thanks a lot for your help once again.

[comejv]

I'm a bit confused about the different ADCs though, in the config and pinmap.h I see mention of 3 ADCs, but in nuttx/boards/arm/stm32h7/nucleo-h743zi/src/stm32_adc.c only 1 and 3 are configured and initialized, with channels 5, 10, 12, 13, 15 for ADC1 and channel 6 for ADC 3.

Is the initialization file incomplete?

[comejv]

Ok after looking at nuttx/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h and issue 24 I started understanding things a bit more, I have now modified nuttx/boards/arm/stm32h7/nucleo-h743zi/src/stm32_adc.c like this to get reading from 10 channels on ADC1:

#define GPIO_ADC12_INP5   (GPIO_ADC12_INP5_0)   /* PB1, channel 5 */
#define GPIO_ADC123_INP10 (GPIO_ADC123_INP10_0) /* PC0, channel 10 */
#define GPIO_ADC12_INP14  (GPIO_ADC12_INP14_0)  /* PA2, channel 14 */
#define GPIO_ADC12_INP15  (GPIO_ADC12_INP15_0)  /* PA3, channel 15 */
#define GPIO_ADC12_INP18  (GPIO_ADC12_INP18_0)  /* PA4, channel 18 */
#define GPIO_ADC12_INP19  (GPIO_ADC12_INP19_0)  /* PA5, channel 19 */
#define GPIO_ADC12_INP3   (GPIO_ADC12_INP3_0)   /* PA6, channel 3 */
#define GPIO_ADC123_INP7  (GPIO_ADC12_INP7_0)   /* PA7, channel 7 */
#define GPIO_ADC123_INP11 (GPIO_ADC123_INP11_0) /* PC1, channel 11 */
#define GPIO_ADC123_INP12 (GPIO_ADC123_INP12_0) /* PC2, channel 12 */

static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
  { 5, 10, 14, 15, 18, 19, 3, 7, 11, 12 };

static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
  {
    GPIO_ADC12_INP5,
    GPIO_ADC123_INP10,
    GPIO_ADC12_INP14,
    GPIO_ADC12_INP15,
    GPIO_ADC12_INP18,
    GPIO_ADC12_INP19,
    GPIO_ADC12_INP3,
    GPIO_ADC123_INP7,
    GPIO_ADC123_INP11,
    GPIO_ADC123_INP12
  };

[comejv]

I also added this to enable ADC2:

#ifdef CONFIG_STM32H7_ADC2
        /* Configure the pins as analog inputs for the selected channels */

        for (i = 0; i < ADC2_NCHANNELS; i++)
          {
            if (g_adc2_pinlist[i] != 0)
              {
                stm32_configgpio(g_adc2_pinlist[i]);
              }
          }

        /* Call stm32_adcinitialize() to get an instance of the ADC interface */

        adc = stm32h7_adc_initialize(2, g_adc2_chanlist, ADC2_NCHANNELS);
        if (adc == NULL)
          {
            aerr("ERROR: Failed to get ADC2 interface\n");
            return -ENODEV;
          }

        /* Register the ADC driver at "/dev/adc[0-1]" */

        ret = adc_register(devname, adc);
        if (ret < 0)
          {
            aerr("ERROR: adc_register(%s) failed: %d\n", devname, ret);
            return ret;
          }

        devname[8]++;
#endif

Is there any reason why ADC2 isn't included in the setup?

[raiden00pl]

It's impossible to enable all the features of a given dev board in a universal way, especially in the case of highly configurable MCUs such as STM32. Upstream boards should be treated more like a guide or example, not a ready-to-use solution for all applications. In the case of ADCs, you can't configure the ADC pins to suit every user application, as this is highly use case specific. Most likely ADC2 is not included because the contributor who added support for this board apparently didn't use it :)

[comejv]

Noted, thank you! Would it be useful if I pushed my patch for ADC2 to upstream?

[raiden00pl]

Probably yes. If all available ADCs on the chip are enabled in one of the upstream configurations, this will give us better code coverage in our CI tests.