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[mlir][dxsa] Add dcl_thread_group instruction#121

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tagolog:dxsa-mlir-dcl_thread_group
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[mlir][dxsa] Add dcl_thread_group instruction#121
tagolog wants to merge 1 commit intoaccess-softek:dxsa-mlirfrom
tagolog:dxsa-mlir-dcl_thread_group

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@tagolog tagolog commented May 1, 2026

Example:
dxsa.dcl_thread_group 8, 8, 1

@tagolog tagolog requested review from asavonic and asl May 1, 2026 03:44
ConfinedAttr<I32Attr, [IntPositive, IntMaxValue<1024>]>:$x,
ConfinedAttr<I32Attr, [IntPositive, IntMaxValue<1024>]>:$y,
ConfinedAttr<I32Attr, [IntPositive, IntMaxValue<64>]>:$z);
let assemblyFormat = [{ $x `,` $y `,` $z attr-dict }];
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bike schedding: maybe it would be better to use syntax outlining the grid better? E.g. dxsa.dcl_thread_group 8 x 8 x 1? or even like this: dxsa.dcl_thread_group <x: 8, y: 8, z: 1> explicitly showing mesh axis?

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I've implemented the operation as the dxsa.dcl_thread_group [8, 8, 1]

Comment thread mlir/lib/Dialect/DXSA/IR/DXSA.cpp Outdated
Comment thread mlir/lib/Target/DXSA/BinaryParser.cpp Outdated
Comment thread mlir/lib/Target/DXSA/BinaryParser.cpp Outdated
Example:
  dxsa.dcl_thread_group [8, 8, 1]

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
@tagolog tagolog force-pushed the dxsa-mlir-dcl_thread_group branch from a89b52d to d02c638 Compare May 5, 2026 23:52
dxsa.dcl_thread_group [8, 8, 1]
```
}];
let arguments = (ins ConfinedAttr<I64ArrayAttr, [ArrayCount<3>]>:$dims);
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Maybe better to have DenseI64ArrayAttr here? Then you could have direct access to the underlying array w/o need to cast to Attributes for individual entries below.

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