os/arch/arm/src/amebasmart: fix sem_timedwait(&g_read_cmd_done) not b…

[zhongnuo-tang]

…eing called

1. change condition from receive_cmd_done flag to MIPI_LPTX_IS_READ, resolve the issue when rx isr is called earlier than sem_timedwait.
2. re-initialize semaphore when timeout happen. 3.. add msg.rx_buff = NULL in send cmd that does not require return from LCD module.

[seokhun-eom24]

How about enabling the MIPI interrupt when the transfer starts and disabling it when it finishes?

In the current changes, the reason for calling sem_init in the Fail_case is to initialize the semaphore after a timedwait timeout so that it cannot be consumed later.
However, this still does not prevent a situation where an ISR occurs after the semaphore is initialized and performs a post.

Also, if we do it this way, I think send_cmd_done and receive_cmd_done become unnecessary, so please review this approach.

This PR addresses a potential issue that could arise on timeout; even if it isn’t merged quickly, I’d like to proceed in a way that fully resolves the problem.

[zhongnuo-tang]

How about enabling the MIPI interrupt when the transfer starts and disabling it when it finishes?

In the current changes, the reason for calling sem_init in the Fail_case is to initialize the semaphore after a timedwait timeout so that it cannot be consumed later. However, this still does not prevent a situation where an ISR occurs after the semaphore is initialized and performs a post.

Also, if we do it this way, I think send_cmd_done and receive_cmd_done become unnecessary, so please review this approach.

This PR addresses a potential issue that could arise on timeout; even if it isn’t merged quickly, I’d like to proceed in a way that fully resolves the problem.

Currently, when we switch to cmd mode to send cmd, we are enabling the interrupt, and disable it after switch to video mode.

static void rtl8730e_mipi_mode_switch(mipi_mode_t mode)
{
	if (mode == CMD_MODE) {
		mipi_mode_switch_to_video(false);
		MIPI_DSI_INT_Config(MIPI, DISABLE, ENABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, DISABLE);
		DelayMs(140);
	} else {
		MIPI_DSI_INT_Config(MIPI, DISABLE, DISABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, ENABLE);
		mipi_mode_switch_to_video(true);
	}
}

and it will be disable at the end of cmd sent if the msg->type == MIPI_DSI_END_OF_TRANSMISSION..

TizenRT/os/arch/arm/src/amebasmart/amebasmart_mipi.c

Line 465 in bdf7f99

MIPI_DSI_INT_Config(g_dsi_host.MIPIx, DISABLE, DISABLE, FALSE);

[seokhun-eom24]

How about enabling the MIPI interrupt when the transfer starts and disabling it when it finishes?
In the current changes, the reason for calling sem_init in the Fail_case is to initialize the semaphore after a timedwait timeout so that it cannot be consumed later. However, this still does not prevent a situation where an ISR occurs after the semaphore is initialized and performs a post.
Also, if we do it this way, I think send_cmd_done and receive_cmd_done become unnecessary, so please review this approach.
This PR addresses a potential issue that could arise on timeout; even if it isn’t merged quickly, I’d like to proceed in a way that fully resolves the problem.

Currently, when we switch to cmd mode to send cmd, we are enabling the interrupt, and disable it after switch to video mode.

static void rtl8730e_mipi_mode_switch(mipi_mode_t mode)
{
	if (mode == CMD_MODE) {
		mipi_mode_switch_to_video(false);
		MIPI_DSI_INT_Config(MIPI, DISABLE, ENABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, DISABLE);
		DelayMs(140);
	} else {
		MIPI_DSI_INT_Config(MIPI, DISABLE, DISABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, ENABLE);
		mipi_mode_switch_to_video(true);
	}
}

and it will be disable at the end of cmd sent if the msg->type == MIPI_DSI_END_OF_TRANSMISSION..

TizenRT/os/arch/arm/src/amebasmart/amebasmart_mipi.c

Line 465 in bdf7f99

MIPI_DSI_INT_Config(g_dsi_host.MIPIx, DISABLE, DISABLE, FALSE);

How about moving the interrupt enable/disable that operates when the mode changes to the point where the transfer occurs?

Doing this would, as mentioned earlier, resolve issues such as an ISR firing after semaphore initialization, and allow us to match each transfer with its ISR one‑to‑one without using send_cmd_done or receive_cmd_done.

Please share your thoughts on this approach.

[zhongnuo-tang]

How about enabling the MIPI interrupt when the transfer starts and disabling it when it finishes?
In the current changes, the reason for calling sem_init in the Fail_case is to initialize the semaphore after a timedwait timeout so that it cannot be consumed later. However, this still does not prevent a situation where an ISR occurs after the semaphore is initialized and performs a post.
Also, if we do it this way, I think send_cmd_done and receive_cmd_done become unnecessary, so please review this approach.
This PR addresses a potential issue that could arise on timeout; even if it isn’t merged quickly, I’d like to proceed in a way that fully resolves the problem.

Currently, when we switch to cmd mode to send cmd, we are enabling the interrupt, and disable it after switch to video mode.

static void rtl8730e_mipi_mode_switch(mipi_mode_t mode)
{
	if (mode == CMD_MODE) {
		mipi_mode_switch_to_video(false);
		MIPI_DSI_INT_Config(MIPI, DISABLE, ENABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, DISABLE);
		DelayMs(140);
	} else {
		MIPI_DSI_INT_Config(MIPI, DISABLE, DISABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, ENABLE);
		mipi_mode_switch_to_video(true);
	}
}

and it will be disable at the end of cmd sent if the msg->type == MIPI_DSI_END_OF_TRANSMISSION..

TizenRT/os/arch/arm/src/amebasmart/amebasmart_mipi.c

Line 465 in bdf7f99

MIPI_DSI_INT_Config(g_dsi_host.MIPIx, DISABLE, DISABLE, FALSE);

How about moving the interrupt enable/disable that operates when the mode changes to the point where the transfer occurs?

Doing this would, as mentioned earlier, resolve issues such as an ISR firing after semaphore initialization, and allow us to match each transfer with its ISR one‑to‑one without using send_cmd_done or receive_cmd_done.

Please share your thoughts on this approach.

For send cmd, i think it can be done since each send will correspond to a send cmd done isr. But for read cmd, it will trigger minimum two isr, when to disable the irq?

1. send cmd done isr MIPI_BIT_CMD_TXDONE (for sending this read request)
2. read cmd isr MIPI_BIT_RCMD1 (replies from LCD)

[seokhun-eom24]

How about enabling the MIPI interrupt when the transfer starts and disabling it when it finishes?
In the current changes, the reason for calling sem_init in the Fail_case is to initialize the semaphore after a timedwait timeout so that it cannot be consumed later. However, this still does not prevent a situation where an ISR occurs after the semaphore is initialized and performs a post.
Also, if we do it this way, I think send_cmd_done and receive_cmd_done become unnecessary, so please review this approach.
This PR addresses a potential issue that could arise on timeout; even if it isn’t merged quickly, I’d like to proceed in a way that fully resolves the problem.

Currently, when we switch to cmd mode to send cmd, we are enabling the interrupt, and disable it after switch to video mode.

static void rtl8730e_mipi_mode_switch(mipi_mode_t mode)
{
	if (mode == CMD_MODE) {
		mipi_mode_switch_to_video(false);
		MIPI_DSI_INT_Config(MIPI, DISABLE, ENABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, DISABLE);
		DelayMs(140);
	} else {
		MIPI_DSI_INT_Config(MIPI, DISABLE, DISABLE, FALSE);
		LCDC_INTConfig(pLCDC, LCDC_BIT_DMA_UN_INTEN, ENABLE);
		mipi_mode_switch_to_video(true);
	}
}

and it will be disable at the end of cmd sent if the msg->type == MIPI_DSI_END_OF_TRANSMISSION..

TizenRT/os/arch/arm/src/amebasmart/amebasmart_mipi.c

Line 465 in bdf7f99

MIPI_DSI_INT_Config(g_dsi_host.MIPIx, DISABLE, DISABLE, FALSE);

How about moving the interrupt enable/disable that operates when the mode changes to the point where the transfer occurs?
Doing this would, as mentioned earlier, resolve issues such as an ISR firing after semaphore initialization, and allow us to match each transfer with its ISR one‑to‑one without using send_cmd_done or receive_cmd_done.
Please share your thoughts on this approach.

For send cmd, i think it can be done since each send will correspond to a send cmd done isr. But for read cmd, it will trigger minimum two isr, when to disable the irq?

1. send cmd done isr MIPI_BIT_CMD_TXDONE (for sending this read request)
2. read cmd isr MIPI_BIT_RCMD1 (replies from LCD)

I think it should be disabled after reading the cmd ISR.
And I have one question about it. Is there any possible scenario in which the cmd-to-isr mapping is not one-to-one?

This PR's final implementation goals are

1. Pair with sem_post and sem_timedwait
2. Modify it so that after a timeout the semaphore does not affect the next ISR.

[zhongnuo-tang]

How about moving the interrupt enable/disable that operates when the mode changes to the point where the transfer occurs?
Doing this would, as mentioned earlier, resolve issues such as an ISR firing after semaphore initialization, and allow us to match each transfer with its ISR one‑to‑one without using send_cmd_done or receive_cmd_done.
Please share your thoughts on this approach.

For send cmd, i think it can be done since each send will correspond to a send cmd done isr. But for read cmd, it will trigger minimum two isr, when to disable the irq?

1. send cmd done isr MIPI_BIT_CMD_TXDONE (for sending this read request)
2. read cmd isr MIPI_BIT_RCMD1 (replies from LCD)

I think it should be disabled after reading the cmd ISR. And I have one question about it. Is there any possible scenario in which the cmd-to-isr mapping is not one-to-one?

This PR's final implementation goals are

1. Pair with sem_post and sem_timedwait
2. Modify it so that after a timeout the semaphore does not affect the next ISR.

Right now i think they are already paired with the help of 'send_cmd_done' and 'receive_cmd_done'.
Read cmd is one that is not one-to-one mapping in terms of cmd-to-isr, as when we read from lcd, we only send 1 cmd (read), but it will trigger at least 2 isr, MIPI_BIT_CMD_TXDONE and MIPI_BIT_RCMD1.

how about below code when timeout

Fail_case:
 	/* 1. Disable and clear MIPI interrupt sources */
 	MIPI_DSI_INT_Config(priv->MIPIx, DISABLE, DISABLE, FALSE);
 	uint32_t pending = MIPI_DSI_INTS_Get(priv->MIPIx);
	MIPI_DSI_INTS_Clr(priv->MIPIx, pending);

	/* 2. Safe to re-init semaphores */
	if (send_cmd_done == 0) {
		sem_init(&g_send_cmd_done, 0, 0);
	}
	if (receive_cmd_done == 0) {
		sem_init(&g_read_cmd_done, 0, 0);
	}
	if (msg->rx_buf && msg->rx_len > 0 && MIPI_LPTX_IS_READ(msg->type)) {
		memset(msg->rx_buf, 0, msg->rx_len);
		rx_data_ptr = NULL;
		rx_data_len = 0;
	}

	/* 3. Re-enable MIPI interrupts for next transfer */
	MIPI_DSI_INT_Config(priv->MIPIx, DISABLE, ENABLE, FALSE);
	....