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b051355
Rewrite phase1
Mar 23, 2020
dce388e
Move in files
Mar 24, 2020
d756b29
Revert "Move in files"
Mar 24, 2020
f22b797
Remove global static user variables
Mar 24, 2020
4329f15
Phase2 compile but still FIXME
Mar 27, 2020
c7e5fd5
Less fixme
Mar 27, 2020
97cd230
Put Phase1 outside nrn_setup
Mar 30, 2020
9750574
Move phase2
Mar 30, 2020
f5416ff
Add more variable for using omp mutex
Mar 31, 2020
9b2548f
Use read_vector in phase1
Apr 1, 2020
b9cf8b0
add a state inside Phase2
Apr 2, 2020
ab05723
Split Phase2::populate
Apr 2, 2020
dda4de9
Use MUT outside Phase1
Apr 3, 2020
8b7d3d0
Fix use of type inside of i
Apr 6, 2020
c1d267b
Several fixes
Apr 6, 2020
b2d83f6
Fix Phase2::read_file
Apr 7, 2020
88dbfe4
Fix use of dparam_size and param_size
Apr 7, 2020
38d7f36
Fix use on nt.ncell before setting
Apr 7, 2020
5bff22d
Load iArray / dArray only if there is elements
Apr 7, 2020
9998321
Fix last things?
Apr 7, 2020
77f973f
Take care of tqueue items
Apr 9, 2020
15d6f31
Fix push_back of vecplay
Apr 9, 2020
9d770b0
Don't use nt before populate
Apr 9, 2020
31b9c42
Even if data is copied and not allocated, nodeindices stay allocated …
Apr 9, 2020
88ad7f6
More fixes
Apr 10, 2020
8b6abc0
Fix more errors
Apr 10, 2020
68893f2
Fix stupid error
Apr 10, 2020
a95c28f
Last fix
Apr 10, 2020
28a0d82
Fix very last stupid error
Apr 10, 2020
4e481a6
add fill_ba_lists
Apr 15, 2020
c6c81f1
Debug neuron installation with spack
Apr 15, 2020
e0b1a7e
rename stage install_neuron
Apr 15, 2020
0bbe69d
Apply suggestions from code review
Apr 21, 2020
102f261
Apply suggestions from code review
Apr 21, 2020
1c22211
Apply suggestions from code review
Apr 21, 2020
4db885c
Update coreneuron/io/nrn_setup.cpp
Apr 21, 2020
ae21bc0
Rename nrn_soa to mem_layout_util
Apr 21, 2020
52de03c
Last fix from Omar
Apr 21, 2020
0de33cb
Rename do_not_open to in_memory_transfer
Apr 21, 2020
df457e2
Apply suggestions from code review
Apr 22, 2020
9230b8d
Rename some variables
Apr 22, 2020
d5a55ec
Remove things related to endianess
Apr 22, 2020
a48d729
Make user_params as much const as possible now
Apr 22, 2020
554ee34
Use name of phase instead of numbers
Apr 22, 2020
fea3175
Remove setted and direct in phase2
Apr 22, 2020
9e91a86
Fix for previous patch
Apr 22, 2020
399f5a0
Layout as an enum, and a bit of more documentation.
Apr 22, 2020
795df9b
from zz to new_maxgid
Apr 22, 2020
57a0693
From pastim_index to patstim_index
Apr 22, 2020
337b23f
mech_layout => mech_data_layout_transform
Apr 22, 2020
e24c3f6
from camel to snake
Apr 22, 2020
733084b
save_events to restore_events
Apr 22, 2020
1c35749
Batch of changes
Apr 22, 2020
b5661a3
Merge permutation, but be careful, jenkins will tell us if it's possi…
Apr 22, 2020
07e8f9a
More split inside Phase2::populate
Apr 22, 2020
61a2bb1
batch 2
Apr 22, 2020
2178eac
batch 3
Apr 22, 2020
479e319
More std::string in FileHandler
Apr 22, 2020
9aa361a
Remove handle_extracon from Phase2::populate
Apr 23, 2020
436ac2a
From ne to n_data_padded
Apr 23, 2020
7e9f19c
Make test executable from any place
Apr 23, 2020
c11d1d6
First attempt to fix the problem of Mutex in a nice way
Apr 22, 2020
7ff6eb4
To avoid copies, we use the old way to handle _data.
Apr 27, 2020
57753c7
Read ml->data directly into _data to avoid copy
Apr 29, 2020
9717323
Fix error during computation of offset for _data in phase2
Apr 30, 2020
11d272d
Fix computing of maxgid
Apr 30, 2020
ca07db7
Need to append the offset after reading
May 1, 2020
1e092ae
Disable GPU test because PGI is broken for now
May 3, 2020
f582625
Don't copy yvec and tvec
May 4, 2020
42d2105
Avoid copy of v_parent_index
May 4, 2020
658789e
Give ownership of y_, t_ to VecPlayContinuous
May 4, 2020
8bfeeef
Enable GPU tests
pramodk May 13, 2020
277cc2a
Fix copy of IVocVect for gpu
May 14, 2020
a816630
Random tries for acc
May 15, 2020
f5388ff
Fix compilation issues for IvocVect with OpenACC (validation test next)
pramodk May 16, 2020
e6cbf38
Fix typo between yvec and tvec
May 18, 2020
ce00487
Fix missing initialization mechanism type in TML
pramodk Jun 2, 2020
b2611e8
Check mechanism compatibility before reading data
pramodk Jun 2, 2020
5668a2e
abort is now moved to phase2.cpp
pramodk Aug 4, 2020
ba5cbdf
Copy nodeindices if it's not null
pramodk Aug 5, 2020
1e89fc5
update comments
pramodk Aug 7, 2020
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6 changes: 0 additions & 6 deletions CMake/ClangFormatHelper.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -23,12 +23,6 @@ if(CLANG_FORMAT_FOUND)
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/*.h*
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/*.ipp*)

# exclude ezoption headers
list(REMOVE_ITEM SRC_FILES_FOR_CLANG_FORMAT
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/utils/ezoption/ezOptionParser.hpp
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/utils/endianness.h
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/utils/swap_endian.h)

# exclude random123
file(GLOB_RECURSE RANDOM123_FILES
${CORENEURON_PROJECT_SOURCE_DIR}/coreneuron/utils/randoms/Random123/*.cpp
Expand Down
2 changes: 1 addition & 1 deletion coreneuron/apps/main1.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -603,7 +603,7 @@ extern "C" int run_solve_core(int argc, char** argv) {

{
Instrumentor::phase p("checkpoint");
write_checkpoint(nrn_threads, nrn_nthread, corenrn_param.checkpointpath.c_str(), nrn_need_byteswap);
write_checkpoint(nrn_threads, nrn_nthread, corenrn_param.checkpointpath.c_str());
}

// must be done after checkpoint (to avoid deleting events)
Expand Down
30 changes: 15 additions & 15 deletions coreneuron/gpu/nrn_acc_manager.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@
#endif
namespace coreneuron {
extern InterleaveInfo* interleave_info;
void copy_ivoc_vect_to_device(IvocVect*& iv, IvocVect*& div);
void copy_ivoc_vect_to_device(const IvocVect& iv, IvocVect& div);
void nrn_ion_global_map_copyto_device();
void nrn_VecPlay_copyto_device(NrnThread* nt, void** d_vecplay);

Expand Down Expand Up @@ -389,21 +389,19 @@ void setup_nrnthreads_on_device(NrnThread* threads, int nthreads) {
#endif
}

void copy_ivoc_vect_to_device(IvocVect*& iv, IvocVect*& div) {
void copy_ivoc_vect_to_device(const IvocVect& from, IvocVect& to) {
#ifdef _OPENACC
if (iv) {
IvocVect* d_iv = (IvocVect*)acc_copyin(iv, sizeof(IvocVect));
acc_memcpy_to_device(&div, &d_iv, sizeof(IvocVect*));

size_t n = iv->size();
if (n) {
double* d_data = (double*)acc_copyin(iv->data(), sizeof(double) * n);
acc_memcpy_to_device(&(d_iv->data_), &d_data, sizeof(double*));
}
IvocVect* d_iv = (IvocVect*)acc_copyin((void*)&from, sizeof(IvocVect));
acc_memcpy_to_device(&to, d_iv, sizeof(IvocVect));

size_t n = from.size();
if (n) {
double* d_data = (double*)acc_copyin((void*)from.data(), sizeof(double) * n);
acc_memcpy_to_device(&(d_iv->data_), &d_data, sizeof(double*));
}
#else
(void)iv;
(void)div;
(void)from;
(void)to;
#endif
}

Expand Down Expand Up @@ -1004,8 +1002,10 @@ void nrn_VecPlay_copyto_device(NrnThread* nt, void** d_vecplay) {
/** copy y_, t_ and discon_indices_ */
copy_ivoc_vect_to_device(vecplay_instance->y_, d_vecplay_instance->y_);
copy_ivoc_vect_to_device(vecplay_instance->t_, d_vecplay_instance->t_);
copy_ivoc_vect_to_device(vecplay_instance->discon_indices_,
d_vecplay_instance->discon_indices_);
if (vecplay_instance->discon_indices_) {
copy_ivoc_vect_to_device(*(vecplay_instance->discon_indices_),
*(d_vecplay_instance->discon_indices_));
}

/** copy PlayRecordEvent : todo: verify this */
PlayRecordEvent* d_e_ =
Expand Down
56 changes: 56 additions & 0 deletions coreneuron/io/mem_layout_util.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,56 @@
#include "mem_layout_util.hpp"

namespace coreneuron {

/// calculate size after padding for specific memory layout
// Warning: this function is declared extern in nrniv_decl.h
int nrn_soa_padded_size(int cnt, int layout) {
return soa_padded_size<NRN_SOA_PAD>(cnt, layout);
}

/// return the new offset considering the byte aligment settings
size_t nrn_soa_byte_align(size_t size) {
if (LAYOUT == Layout::SoA) {
size_t dbl_align = NRN_SOA_BYTE_ALIGN / sizeof(double);
size_t remainder = size % dbl_align;
if (remainder) {
size += dbl_align - remainder;
}
nrn_assert((size * sizeof(double)) % NRN_SOA_BYTE_ALIGN == 0);
}
return size;
}

int nrn_i_layout(int icnt, int cnt, int isz, int sz, int layout) {
switch(layout) {
case Layout::AoS:
return icnt * sz + isz;
case Layout::SoA:
int padded_cnt = nrn_soa_padded_size(cnt, layout); // may want to factor out to save time
return icnt + isz * padded_cnt;
}

nrn_assert(false);
return 0;
}

// file data is AoS. ie.
// organized as cnt array instances of mtype each of size sz.
// So input index i refers to i_instance*sz + i_item offset
// Return the corresponding SoA index -- taking into account the
// alignment requirements. Ie. i_instance + i_item*align_cnt.

int nrn_param_layout(int i, int mtype, Memb_list* ml) {
int layout = corenrn.get_mech_data_layout()[mtype];
switch(layout) {
case Layout::AoS:
return i;
case Layout::SoA:
nrn_assert(layout == Layout::SoA);
int sz = corenrn.get_prop_param_size()[mtype];
return nrn_i_layout(i / sz, ml->nodecount, i % sz, sz, layout);
}
nrn_assert(false);
return 0;
}
} // namespace coreneuron
45 changes: 45 additions & 0 deletions coreneuron/io/mem_layout_util.hpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
#pragma once

#include "coreneuron/coreneuron.hpp"
#include "coreneuron/nrniv/nrniv_decl.h"

namespace coreneuron {

#if !defined(NRN_SOA_PAD)
// for layout 0, every range variable array must have a size which
// is a multiple of NRN_SOA_PAD doubles
#define NRN_SOA_PAD 8
#endif

// If MATRIX_LAYOUT is 1 then a,b,d,rhs,v,area is not padded using NRN_SOA_PAD
// When MATRIX_LAYOUT is 0 then mechanism pdata index values into _actual_v
// and _actual_area data need to be updated.
enum Layout {
SoA = 0,
AoS = 1
};

#if !defined(LAYOUT)
#define LAYOUT Layout::AoS
#define MATRIX_LAYOUT Layout::AoS
#else
#define MATRIX_LAYOUT LAYOUT
#endif

/// return the new offset considering the byte aligment settings
size_t nrn_soa_byte_align(size_t i);

/// This function return the index in a flat array of a matrix coordinate (icnt, isz).
/// The matrix size is (cnt, sz)
/// Depending of the layout some padding can be calculated
int nrn_i_layout(int icnt, int cnt, int isz, int sz, int layout);

// file data is AoS. ie.
// organized as cnt array instances of mtype each of size sz.
// So input index i refers to i_instance*sz + i_item offset
// Return the corresponding SoA index -- taking into account the
// alignment requirements. Ie. i_instance + i_item*align_cnt.

int nrn_param_layout(int i, int mtype, Memb_list* ml);
} // namespace coreneuron

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