STM32H7B0VBTX board variant added to the boards (#2387)

* STM32H7B0VBTX board variant added to the boards

tested everything works like expected for STM32H7B0VBT. I tested specificly for STM32H7B0VBT in my project.

Signed-off-by: Aurentiaco35 <[email protected]>
Co-authored-by: Frederic Pillon <[email protected]>

Author: Aurentiaco35

README.md

@@ -583,6 +583,10 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32H757AI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H757II | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H757XI | Generic Board | *2.7.0* |  |
+| :yellow_heart: | STM32H7A3VGHX<br>STM32H7A3VGTX | Generic Board | **2.8.0** |  |
+| :yellow_heart: | STM32H7A3VIHX<br>STM32H7A3VITX | Generic Board | **2.8.0** |  |
+| :yellow_heart: | STM32H7B0VBTX | Generic Board | **2.8.0** |  |
+| :yellow_heart: | STM32H7B3VIHX<br>STM32H7B3VITX | Generic Board | **2.8.0** |  |
 
 ### Generic STM32L0 boards
 

boards.txt

@@ -7967,6 +7967,62 @@ GenH7.menu.pnum.GENERIC_H757XIHX.build.board=GENERIC_H757XIHX
 GenH7.menu.pnum.GENERIC_H757XIHX.build.product_line=STM32H757xx
 GenH7.menu.pnum.GENERIC_H757XIHX.build.variant=STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH
 
+# Generic H7A3VGHx
+GenH7.menu.pnum.GENERIC_H7A3VGHX=Generic H7A3VGHx
+GenH7.menu.pnum.GENERIC_H7A3VGHX.upload.maximum_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VGHX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VGHX.build.board=GENERIC_H7A3VGHX
+GenH7.menu.pnum.GENERIC_H7A3VGHX.build.product_line=STM32H7A3xx
+GenH7.menu.pnum.GENERIC_H7A3VGHX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7A3VIHx
+GenH7.menu.pnum.GENERIC_H7A3VIHX=Generic H7A3VIHx
+GenH7.menu.pnum.GENERIC_H7A3VIHX.upload.maximum_size=2097152
+GenH7.menu.pnum.GENERIC_H7A3VIHX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VIHX.build.board=GENERIC_H7A3VIHX
+GenH7.menu.pnum.GENERIC_H7A3VIHX.build.product_line=STM32H7A3xx
+GenH7.menu.pnum.GENERIC_H7A3VIHX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7A3VGTx
+GenH7.menu.pnum.GENERIC_H7A3VGTX=Generic H7A3VGTx
+GenH7.menu.pnum.GENERIC_H7A3VGTX.upload.maximum_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VGTX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VGTX.build.board=GENERIC_H7A3VGTX
+GenH7.menu.pnum.GENERIC_H7A3VGTX.build.product_line=STM32H7A3xx
+GenH7.menu.pnum.GENERIC_H7A3VGTX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7A3VITx
+GenH7.menu.pnum.GENERIC_H7A3VITX=Generic H7A3VITx
+GenH7.menu.pnum.GENERIC_H7A3VITX.upload.maximum_size=2097152
+GenH7.menu.pnum.GENERIC_H7A3VITX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7A3VITX.build.board=GENERIC_H7A3VITX
+GenH7.menu.pnum.GENERIC_H7A3VITX.build.product_line=STM32H7A3xx
+GenH7.menu.pnum.GENERIC_H7A3VITX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7B0VBTx
+GenH7.menu.pnum.GENERIC_H7B0VBTX=Generic H7B0VBTx
+GenH7.menu.pnum.GENERIC_H7B0VBTX.upload.maximum_size=131072
+GenH7.menu.pnum.GENERIC_H7B0VBTX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7B0VBTX.build.board=GENERIC_H7B0VBTX
+GenH7.menu.pnum.GENERIC_H7B0VBTX.build.product_line=STM32H7B0xx
+GenH7.menu.pnum.GENERIC_H7B0VBTX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7B3VIHx
+GenH7.menu.pnum.GENERIC_H7B3VIHX=Generic H7B3VIHx
+GenH7.menu.pnum.GENERIC_H7B3VIHX.upload.maximum_size=2097152
+GenH7.menu.pnum.GENERIC_H7B3VIHX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7B3VIHX.build.board=GENERIC_H7B3VIHX
+GenH7.menu.pnum.GENERIC_H7B3VIHX.build.product_line=STM32H7B3xx
+GenH7.menu.pnum.GENERIC_H7B3VIHX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
+# Generic H7B3VITx
+GenH7.menu.pnum.GENERIC_H7B3VITX=Generic H7B3VITx
+GenH7.menu.pnum.GENERIC_H7B3VITX.upload.maximum_size=2097152
+GenH7.menu.pnum.GENERIC_H7B3VITX.upload.maximum_data_size=1048576
+GenH7.menu.pnum.GENERIC_H7B3VITX.build.board=GENERIC_H7B3VITX
+GenH7.menu.pnum.GENERIC_H7B3VITX.build.product_line=STM32H7B3xx
+GenH7.menu.pnum.GENERIC_H7B3VITX.build.variant=STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)
+
 # Upload menu
 GenH7.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
 GenH7.menu.upload_method.swdMethod.upload.protocol=0

variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/generic_clock.c

@@ -23,8 +23,58 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+  /*AXI clock gating */
+  RCC->CKGAENR = 0xFFFFFFFF;
+
+  /** Supply configuration update enable
+  */
+  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+  while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
+  RCC_OscInitStruct.HSICalibrationValue = 64;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 12;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 2;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN = 4096;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
+                                | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */

variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/ldscript.ld

@@ -0,0 +1,175 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author      : STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32H7 series
+**                128Kbytes FLASH and 1376Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** Copyright (c) 2023 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
+  FLASH (rx)     : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+  DTCMRAM1 (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
+  DTCMRAM2 (xrw) : ORIGIN = 0x20010000, LENGTH = 64K
+  RAM (xrw)      : ORIGIN = 0x24000000, LENGTH = LD_MAX_DATA_SIZE
+  RAM_CD (xrw)   : ORIGIN = 0x30000000, LENGTH = 128K
+  RAM_SRD (xrw)  : ORIGIN = 0x38000000, LENGTH = 32K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}