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reset: starfive-jh7100: Add StarFive JH7100 reset driver
Add a driver for the StarFive JH7100 reset controller. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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‎MAINTAINERS‎

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@@ -18137,6 +18137,13 @@ F: Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
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F: drivers/clk/starfive/clk-starfive-jh7100.c
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F: include/dt-bindings/clock/starfive-jh7100.h
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STARFIVE JH7100 RESET CONTROLLER DRIVER
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M: Emil Renner Berthing <kernel@esmil.dk>
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S: Maintained
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F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
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F: drivers/reset/reset-starfive-jh7100.c
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F: include/dt-bindings/reset/starfive-jh7100.h
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STATIC BRANCH/CALL
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M: Peter Zijlstra <peterz@infradead.org>
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M: Josh Poimboeuf <jpoimboe@redhat.com>

‎drivers/reset/Kconfig‎

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@@ -224,6 +224,13 @@ config RESET_SOCFPGA
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This enables the reset driver for the SoCFPGA ARMv7 platforms. This
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driver gets initialized early during platform init calls.
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config RESET_STARFIVE_JH7100
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bool "StarFive JH7100 Reset Driver"
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depends on SOC_STARFIVE || COMPILE_TEST
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default SOC_STARFIVE
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help
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This enables the reset controller driver for the StarFive JH7100 SoC.
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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default ARCH_SUNXI

‎drivers/reset/Makefile‎

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@@ -29,6 +29,7 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
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obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
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obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o

‎drivers/reset/reset-starfive-jh7100.c‎

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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Reset driver for the StarFive JH7100 SoC
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*
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* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
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*/
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#include <linux/bitmap.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/spinlock.h>
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#include <dt-bindings/reset/starfive-jh7100.h>
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/* register offsets */
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#define JH7100_RESET_ASSERT0 0x00
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#define JH7100_RESET_ASSERT1 0x04
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#define JH7100_RESET_ASSERT2 0x08
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#define JH7100_RESET_ASSERT3 0x0c
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#define JH7100_RESET_STATUS0 0x10
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#define JH7100_RESET_STATUS1 0x14
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#define JH7100_RESET_STATUS2 0x18
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#define JH7100_RESET_STATUS3 0x1c
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/*
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* Writing a 1 to the n'th bit of the m'th ASSERT register asserts
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* line 32m + n, and writing a 0 deasserts the same line.
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* Most reset lines have their status inverted so a 0 bit in the STATUS
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* register means the line is asserted and a 1 means it's deasserted. A few
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* lines don't though, so store the expected value of the status registers when
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* all lines are asserted.
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*/
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static const u64 jh7100_reset_asserted[2] = {
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/* STATUS0 */
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BIT_ULL_MASK(JH7100_RST_U74) |
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BIT_ULL_MASK(JH7100_RST_VP6_DRESET) |
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BIT_ULL_MASK(JH7100_RST_VP6_BRESET) |
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/* STATUS1 */
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BIT_ULL_MASK(JH7100_RST_HIFI4_DRESET) |
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BIT_ULL_MASK(JH7100_RST_HIFI4_BRESET),
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/* STATUS2 */
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BIT_ULL_MASK(JH7100_RST_E24) |
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/* STATUS3 */
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0,
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};
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struct jh7100_reset {
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struct reset_controller_dev rcdev;
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/* protect registers against concurrent read-modify-write */
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spinlock_t lock;
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void __iomem *base;
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};
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static inline struct jh7100_reset *
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jh7100_reset_from(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct jh7100_reset, rcdev);
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}
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static int jh7100_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct jh7100_reset *data = jh7100_reset_from(rcdev);
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unsigned long offset = BIT_ULL_WORD(id);
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u64 mask = BIT_ULL_MASK(id);
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void __iomem *reg_assert = data->base + JH7100_RESET_ASSERT0 + offset * sizeof(u64);
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void __iomem *reg_status = data->base + JH7100_RESET_STATUS0 + offset * sizeof(u64);
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u64 done = jh7100_reset_asserted[offset] & mask;
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u64 value;
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unsigned long flags;
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int ret;
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if (!assert)
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done ^= mask;
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spin_lock_irqsave(&data->lock, flags);
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value = readq(reg_assert);
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if (assert)
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value |= mask;
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else
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value &= ~mask;
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writeq(value, reg_assert);
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/* if the associated clock is gated, deasserting might otherwise hang forever */
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ret = readq_poll_timeout_atomic(reg_status, value, (value & mask) == done, 0, 1000);
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spin_unlock_irqrestore(&data->lock, flags);
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return ret;
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}
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static int jh7100_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return jh7100_reset_update(rcdev, id, true);
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}
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static int jh7100_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return jh7100_reset_update(rcdev, id, false);
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}
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static int jh7100_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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int ret;
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ret = jh7100_reset_assert(rcdev, id);
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if (ret)
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return ret;
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return jh7100_reset_deassert(rcdev, id);
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}
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static int jh7100_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct jh7100_reset *data = jh7100_reset_from(rcdev);
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unsigned long offset = BIT_ULL_WORD(id);
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u64 mask = BIT_ULL_MASK(id);
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void __iomem *reg_status = data->base + JH7100_RESET_STATUS0 + offset * sizeof(u64);
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u64 value = readq(reg_status);
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return !((value ^ jh7100_reset_asserted[offset]) & mask);
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}
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static const struct reset_control_ops jh7100_reset_ops = {
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.assert = jh7100_reset_assert,
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.deassert = jh7100_reset_deassert,
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.reset = jh7100_reset_reset,
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.status = jh7100_reset_status,
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};
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static int __init jh7100_reset_probe(struct platform_device *pdev)
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{
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struct jh7100_reset *data;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(data->base))
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return PTR_ERR(data->base);
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data->rcdev.ops = &jh7100_reset_ops;
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = JH7100_RSTN_END;
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data->rcdev.dev = &pdev->dev;
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data->rcdev.of_node = pdev->dev.of_node;
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spin_lock_init(&data->lock);
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return devm_reset_controller_register(&pdev->dev, &data->rcdev);
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}
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static const struct of_device_id jh7100_reset_dt_ids[] = {
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{ .compatible = "starfive,jh7100-reset" },
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{ /* sentinel */ }
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};
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static struct platform_driver jh7100_reset_driver = {
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.driver = {
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.name = "jh7100-reset",
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.of_match_table = jh7100_reset_dt_ids,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver_probe(jh7100_reset_driver, jh7100_reset_probe);

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