From c84f28a5553742023fc64782d4f651c11074f5ef Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Fri, 6 Feb 2026 10:38:38 +0000 Subject: [PATCH 01/15] Add SHA3 and SVE SHA3 APIs Fixes #98692 Fixes #94425 --- src/coreclr/jit/hwintrinsic.cpp | 4 +- src/coreclr/jit/hwintrinsicarm64.cpp | 5 + src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 21 ++- src/coreclr/jit/hwintrinsiclistarm64.h | 13 ++ src/coreclr/jit/hwintrinsiclistarm64sve.h | 9 + src/coreclr/jit/lowerarmarch.cpp | 9 + src/coreclr/jit/lsraarm64.cpp | 11 +- .../ILLink.Substitutions.NoArmIntrinsics.xml | 12 ++ .../System.Private.CoreLib.Shared.projitems | 4 + .../Arm/Sha3.PlatformNotSupported.cs | 154 ++++++++++++++++++ .../src/System/Runtime/Intrinsics/Arm/Sha3.cs | 154 ++++++++++++++++++ .../Arm/SveSha3.PlatformNotSupported.cs | 48 ++++++ .../System/Runtime/Intrinsics/Arm/SveSha3.cs | 48 ++++++ .../ref/System.Runtime.Intrinsics.cs | 42 +++++ .../Arm/AdvSimdTests.cs | 27 +++ .../GenerateHWIntrinsicTests/Arm/SveTests.cs | 6 + .../GenerateHWIntrinsicTests_Arm.cs | 2 + .../Arm/Sha3/Program.Sha3.cs | 16 ++ .../HardwareIntrinsics/Arm/Sha3/Sha3_r.csproj | 14 ++ .../Arm/Sha3/Sha3_ro.csproj | 14 ++ .../HardwareIntrinsics/Arm/Shared/Helpers.cs | 8 + .../HardwareIntrinsics/Arm/Shared/Program.cs | 2 + .../Arm/SveSha3/Program.SveSha3.cs | 16 ++ .../Arm/SveSha3/SveSha3_r.csproj | 14 ++ .../Arm/SveSha3/SveSha3_ro.csproj | 14 ++ 25 files changed, 655 insertions(+), 12 deletions(-) create mode 100644 src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs create mode 100644 src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs create mode 100644 src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs create mode 100644 src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_r.csproj create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_ro.csproj create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_r.csproj create mode 100644 src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_ro.csproj diff --git a/src/coreclr/jit/hwintrinsic.cpp b/src/coreclr/jit/hwintrinsic.cpp index a5dc1001d3d92c..3c0fda0fe8c08d 100644 --- a/src/coreclr/jit/hwintrinsic.cpp +++ b/src/coreclr/jit/hwintrinsic.cpp @@ -1007,10 +1007,10 @@ static const HWIntrinsicIsaRange hwintrinsicIsaRangeArray[] = { { NI_Illegal, NI_Illegal }, // Rcpc2 { FIRST_NI_Sve, LAST_NI_Sve }, // Sve { FIRST_NI_Sve2, LAST_NI_Sve2 }, // Sve2 - { NI_Illegal, NI_Illegal }, // Sha3 + { FIRST_NI_Sha3, LAST_NI_Sha3 }, // Sha3 { NI_Illegal, NI_Illegal }, // Sm4 { NI_Illegal, NI_Illegal }, // SveAes - { NI_Illegal, NI_Illegal }, // SveSha3 + { FIRST_NI_SveSha3, LAST_NI_SveSha3 }, // SveSha3 { NI_Illegal, NI_Illegal }, // SveSm4 { FIRST_NI_ArmBase_Arm64, LAST_NI_ArmBase_Arm64 }, // ArmBase_Arm64 { FIRST_NI_AdvSimd_Arm64, LAST_NI_AdvSimd_Arm64 }, // AdvSimd_Arm64 diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index 838e6d24b093e0..1a212e4cc624b0 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -576,6 +576,11 @@ void HWIntrinsicInfo::lookupImmBounds( immUpperBound = 7; break; + case NI_Sha3_XorRotateRight: + immLowerBound = 0; + immUpperBound = 63; + break; + default: unreached(); } diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 5bc88dfd4464d2..b228d9b0db8117 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -1225,9 +1225,21 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) break; case 3: - assert(!hasImmediateOperand); - GetEmitter()->emitIns_R_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, op3Reg, opt); + if (hasImmediateOperand) + { + assert(!isRMW); + HWIntrinsicImmOpHelper helper(this, intrin.op3, node); + for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd()) + { + const int imm = helper.ImmValue(); + GetEmitter()->emitIns_R_R_R_I(ins, emitSize, targetReg, op1Reg, op2Reg, imm, opt); + } + } + else + { + GetEmitter()->emitIns_R_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, op3Reg, opt); + } break; default: @@ -2102,6 +2114,11 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) GetEmitter()->emitIns_R_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, op3Reg); break; + case NI_Sha3_BitwiseClearXor: + case NI_Sha3_Xor: + GetEmitter()->emitIns_R_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, op3Reg, INS_OPTS_16B); + break; + case NI_Sve_ConvertMaskToVector: // PMOV would be ideal here, but it is in SVE2.1. // Instead, use a predicated move: MOV ., /Z, #1 diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 1c6d080b66eaba..c24df907d01ed1 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -875,6 +875,19 @@ HARDWARE_INTRINSIC(Sha256, ScheduleUpdate0, HARDWARE_INTRINSIC(Sha256, ScheduleUpdate1, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sha256su1, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_HasRMWSemantics) #define LAST_NI_Sha256 NI_Sha256_ScheduleUpdate1 +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// ISA Function name SIMD size NumArg EncodesExtraTypeArg Instructions Category Flags +// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE} +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// Sha3 +#define FIRST_NI_Sha3 NI_Sha3_BitwiseClearXor +HARDWARE_INTRINSIC(Sha3, BitwiseClearXor, -1, 3, {INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(Sha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) +HARDWARE_INTRINSIC(Sha3, Xor, -1, 3, {INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(Sha3, XorRotateRight, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xar, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_HasImmediateOperand) +#define LAST_NI_Sha3 NI_Sha3_XorRotateRight + + #endif // FEATURE_HW_INTRINSIC #include "hwintrinsiclistarm64sve.h" diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 84e490e6490188..14479cf55beeae 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -489,6 +489,15 @@ HARDWARE_INTRINSIC(Sve2, Xor, HARDWARE_INTRINSIC(Sve2, XorRotateRight, -1, 3, {INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_invalid, INS_invalid}, HW_Category_ShiftRightByImmediate, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand) #define LAST_NI_Sve2 NI_Sve2_XorRotateRight +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// ISA Function name SIMD size NumArg Instructions Category Flags +// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE} +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// Sha3 +#define FIRST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor +HARDWARE_INTRINSIC(SveSha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rax1, INS_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) +#define LAST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor + // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** // ISA Function name SIMD size NumArg Instructions Category Flags // {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE} diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index ffdd8b9729d73b..0fc235e44ba427 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -4178,6 +4178,15 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node) } break; + case NI_Sha3_XorRotateRight: + assert(hasImmediateOperand); + assert(varTypeIsIntegral(intrin.op3)); + if (intrin.op3->IsCnsIntOrI()) + { + MakeSrcContained(node, intrin.op3); + } + break; + default: unreached(); } diff --git a/src/coreclr/jit/lsraarm64.cpp b/src/coreclr/jit/lsraarm64.cpp index 3236db623472cd..f1bdad522c1912 100644 --- a/src/coreclr/jit/lsraarm64.cpp +++ b/src/coreclr/jit/lsraarm64.cpp @@ -1640,6 +1640,7 @@ void LinearScan::BuildHWIntrinsicImmediate(GenTreeHWIntrinsic* intrinsicTree, co case NI_AdvSimd_Arm64_LoadAndInsertScalarVector128x3: case NI_AdvSimd_Arm64_LoadAndInsertScalarVector128x4: case NI_AdvSimd_Arm64_DuplicateSelectedScalarToVector128: + case NI_Sve_ShiftRightArithmeticForDivide: needBranchTargetReg = !intrin.op2->isContainedIntOrIImmed(); break; @@ -1647,6 +1648,8 @@ void LinearScan::BuildHWIntrinsicImmediate(GenTreeHWIntrinsic* intrinsicTree, co case NI_AdvSimd_ExtractVector128: case NI_AdvSimd_StoreSelectedScalar: case NI_AdvSimd_Arm64_StoreSelectedScalar: + case NI_Sha3_XorRotateRight: + case NI_Sve_AddRotateComplex: case NI_Sve_Prefetch16Bit: case NI_Sve_Prefetch32Bit: case NI_Sve_Prefetch64Bit: @@ -1732,14 +1735,6 @@ void LinearScan::BuildHWIntrinsicImmediate(GenTreeHWIntrinsic* intrinsicTree, co setInternalRegsDelayFree = true; break; - case NI_Sve_ShiftRightArithmeticForDivide: - needBranchTargetReg = !intrin.op2->isContainedIntOrIImmed(); - break; - - case NI_Sve_AddRotateComplex: - needBranchTargetReg = !intrin.op3->isContainedIntOrIImmed(); - break; - case NI_Sve_MultiplyAddRotateComplex: case NI_Sve2_MultiplyAddRotateComplex: case NI_Sve2_MultiplyAddRoundedDoublingSaturateHighRotateComplex: diff --git a/src/libraries/System.Private.CoreLib/src/ILLink/ILLink.Substitutions.NoArmIntrinsics.xml b/src/libraries/System.Private.CoreLib/src/ILLink/ILLink.Substitutions.NoArmIntrinsics.xml index d9da2ff0648052..1215252fbffd2a 100644 --- a/src/libraries/System.Private.CoreLib/src/ILLink/ILLink.Substitutions.NoArmIntrinsics.xml +++ b/src/libraries/System.Private.CoreLib/src/ILLink/ILLink.Substitutions.NoArmIntrinsics.xml @@ -63,5 +63,17 @@ + + + + + + + + + + + + diff --git a/src/libraries/System.Private.CoreLib/src/System.Private.CoreLib.Shared.projitems b/src/libraries/System.Private.CoreLib/src/System.Private.CoreLib.Shared.projitems index fe63de3b15d6f7..7e3a4dfafee8c1 100644 --- a/src/libraries/System.Private.CoreLib/src/System.Private.CoreLib.Shared.projitems +++ b/src/libraries/System.Private.CoreLib/src/System.Private.CoreLib.Shared.projitems @@ -2846,6 +2846,8 @@ + + @@ -2858,6 +2860,8 @@ + + diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs new file mode 100644 index 00000000000000..5051bd98e1a5b6 --- /dev/null +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs @@ -0,0 +1,154 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System.Diagnostics.CodeAnalysis; +using System.Runtime.CompilerServices; + +namespace System.Runtime.Intrinsics.Arm +{ + /// Provides access to the ARM Sha3 hardware instructions via intrinsics. + [Intrinsic] + [CLSCompliant(false)] + public abstract class Sha3 : ArmBase + { + internal Sha3() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + + /// Provides access to the ARM Sha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. + [Intrinsic] + public new abstract class Arm64 : ArmBase.Arm64 + { + internal Arm64() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + } + + + // Bit Clear and Exclusive OR + + /// + /// uint8x16_t vbcaxq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// int16x8_t vbcaxq_s16(int16x8_t a, int16x8_t b, int16x8_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// int32x4_t vbcaxq_s32(int32x4_t a, int32x4_t b, int32x4_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// int64x2_t vbcaxq_s64(int64x2_t a, int64x2_t b, int64x2_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// int8x16_t vbcaxq_s8(int8x16_t a, int8x16_t b, int8x16_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// uint16x8_t vbcaxq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// uint32x4_t vbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + /// + /// uint64x2_t vbcaxq_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + + + // Rotate and Exclusive OR + + /// + /// uint64x2_t vrax1q_u64(uint64x2_t a, uint64x2_t b) + /// RAX1 Vd.2D,Vn.2D,Vm.2D + /// + public static unsafe Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) { throw new PlatformNotSupportedException(); } + + + // Three-way Exclusive OR performs + + /// + /// uint8x16_t veor3q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// int16x8_t veor3q_s16(int16x8_t a, int16x8_t b, int16x8_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// int32x4_t veor3q_s32(int32x4_t a, int32x4_t b, int32x4_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// int64x2_t veor3q_s64(int64x2_t a, int64x2_t b, int64x2_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); }; + + /// + /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// uint32x4_t veor3q_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + /// + /// uint64x2_t veor3q_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + + + // Exclusive OR and Rotate + + /// + /// uint64x2_t vxarq_u64(uint64x2_t a, uint64x2_t b, const int imm6) + /// XAR Vd.2D,Vn.2D,Vm.2D,imm6 + /// + public static unsafe Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) { throw new PlatformNotSupportedException(); } + + } +} diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs new file mode 100644 index 00000000000000..99a091c4a039a4 --- /dev/null +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs @@ -0,0 +1,154 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System.Diagnostics.CodeAnalysis; +using System.Runtime.CompilerServices; + +namespace System.Runtime.Intrinsics.Arm +{ + /// Provides access to the ARM Sha3 hardware instructions via intrinsics. + [Intrinsic] + [CLSCompliant(false)] + public abstract class Sha3 : ArmBase + { + internal Sha3() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + + /// Provides access to the ARM Sha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. + [Intrinsic] + public new abstract class Arm64 : ArmBase.Arm64 + { + internal Arm64() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + } + + + // Bit Clear and Exclusive OR + + /// + /// uint8x16_t vbcaxq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// int16x8_t vbcaxq_s16(int16x8_t a, int16x8_t b, int16x8_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// int32x4_t vbcaxq_s32(int32x4_t a, int32x4_t b, int32x4_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// int64x2_t vbcaxq_s64(int64x2_t a, int64x2_t b, int64x2_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// int8x16_t vbcaxq_s8(int8x16_t a, int8x16_t b, int8x16_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// uint16x8_t vbcaxq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// uint32x4_t vbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + /// + /// uint64x2_t vbcaxq_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) + /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + + + // Rotate and Exclusive OR + + /// + /// uint64x2_t vrax1q_u64(uint64x2_t a, uint64x2_t b) + /// RAX1 Vd.2D,Vn.2D,Vm.2D + /// + public static unsafe Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + + + // Three-way Exclusive OR performs + + /// + /// uint8x16_t veor3q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// int16x8_t veor3q_s16(int16x8_t a, int16x8_t b, int16x8_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// int32x4_t veor3q_s32(int32x4_t a, int32x4_t b, int32x4_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// int64x2_t veor3q_s64(int64x2_t a, int64x2_t b, int64x2_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// uint32x4_t veor3q_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + /// + /// uint64x2_t veor3q_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) + /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B + /// + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + + + // Exclusive OR and Rotate + + /// + /// uint64x2_t vxarq_u64(uint64x2_t a, uint64x2_t b, const int imm6) + /// XAR Vd.2D,Vn.2D,Vm.2D,imm6 + /// + public static unsafe Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) => XorRotateRight(left, right, count); + + } +} diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs new file mode 100644 index 00000000000000..728f3095a1d88a --- /dev/null +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs @@ -0,0 +1,48 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System.Runtime.CompilerServices; + +namespace System.Runtime.Intrinsics.Arm +{ + /// Provides access to the ARM SveSha3 hardware instructions via intrinsics. + [Intrinsic] + [CLSCompliant(false)] + public abstract class SveSha3 : ArmBase + { + internal SveSha3() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + + /// Provides access to the ARM SveSha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. + [Intrinsic] + public new abstract class Arm64 : ArmBase.Arm64 + { + internal Arm64() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + } + + + // Bitwise rotate left by 1 and exclusive OR + + /// + /// svint64_t svrax1[_s64](svint64_t op1, svint64_t op2) + /// RAX1 Zresult.D, Zop1.D, Zop2.D + /// + public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } + + /// + /// svuint64_t svrax1[_u64](svuint64_t op1, svuint64_t op2) + /// RAX1 Zresult.D, Zop1.D, Zop2.D + /// + public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } + + } +} diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs new file mode 100644 index 00000000000000..de30c3a3e268a0 --- /dev/null +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs @@ -0,0 +1,48 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System.Runtime.CompilerServices; +using System.Numerics; + +namespace System.Runtime.Intrinsics.Arm +{ + /// Provides access to the ARM SveSha3 hardware instructions via intrinsics. + [Intrinsic] + [CLSCompliant(false)] + public abstract class SveSha3 : ArmBase + { + internal SveSha3() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + + /// Provides access to the ARM SveSha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. + [Intrinsic] + public new abstract class Arm64 : ArmBase.Arm64 + { + internal Arm64() { } + + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { get => IsSupported; } + } + + + // Bitwise rotate left by 1 and exclusive OR + + /// + /// svint64_t svrax1[_s64](svint64_t op1, svint64_t op2) + /// RAX1 Zresult.D, Zop1.D, Zop2.D + /// + public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + + /// + /// svuint64_t svrax1[_u64](svuint64_t op1, svuint64_t op2) + /// RAX1 Zresult.D, Zop1.D, Zop2.D + /// + public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + } +} diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index ada0999ed91e96..f5444338adf557 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -8142,6 +8142,48 @@ internal Arm64() { } public static System.Numerics.Vector XorRotateRight(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected] byte count) { throw null; } public static System.Numerics.Vector XorRotateRight(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected] byte count) { throw null; } } + [System.CLSCompliantAttribute(false)] + public abstract partial class Sha3 : System.Runtime.Intrinsics.Arm.ArmBase + { + internal Sha3() { } + public static new bool IsSupported { get { throw null; } } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseRotateLeftBy1AndXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 rol1) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static unsafe System.Runtime.Intrinsics.Vector128 XorRotateRight(System.Runtime.Intrinsics.Vector128 left, System.Runtime.Intrinsics.Vector128 right, [ConstantExpected] byte count) { throw null; } + public new abstract partial class Arm64 : System.Runtime.Intrinsics.Arm.ArmBase.Arm64 + { + internal Arm64() { } + public static new bool IsSupported { get { throw null; } } + } + } + [System.CLSCompliantAttribute(false)] + public abstract partial class SveSha3 : System.Runtime.Intrinsics.Arm.ArmBase + { + internal SveSha3() { } + public static new bool IsSupported { get { throw null; } } + public static System.Numerics.Vector BitwiseRotateLeftBy1AndXor(System.Numerics.Vector xor, System.Numerics.Vector rol1) { throw null; } + public static System.Numerics.Vector BitwiseRotateLeftBy1AndXor(System.Numerics.Vector xor, System.Numerics.Vector rol1) { throw null; } + public new abstract partial class Arm64 : System.Runtime.Intrinsics.Arm.ArmBase.Arm64 + { + internal Arm64() { } + public static new bool IsSupported { get { throw null; } } + } + } public enum SveMaskPattern : byte { diff --git a/src/tests/Common/GenerateHWIntrinsicTests/Arm/AdvSimdTests.cs b/src/tests/Common/GenerateHWIntrinsicTests/Arm/AdvSimdTests.cs index b1f1a902ff1a2c..7d5691eb2e20cd 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/Arm/AdvSimdTests.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/Arm/AdvSimdTests.cs @@ -2735,4 +2735,31 @@ static class AdvSimdTests (Templates.SecureHashBinOpTest, new Dictionary { ["TestName"] = "ScheduleUpdate0_Vector128_UInt32", ["Method"] = "ScheduleUpdate0", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp1"] = "0x00112233", ["NextValueOp2"] = "0x44556677", ["ExpectedResult"] = "{0x2E9FE839, 0x2E9FE839, 0x2E9FE839, 0xBFB0F94A}"}), (Templates.SecureHashTernOpTest, new Dictionary { ["TestName"] = "ScheduleUpdate1_Vector128_UInt32", ["Method"] = "ScheduleUpdate1", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp1"] = "0x00112233", ["NextValueOp2"] = "0x44556677", ["NextValueOp3"] = "0x8899AABB", ["ExpectedResult"] = "{0x248F1BDF, 0x248F1BDF, 0xB303DDBA, 0xF74821FE}"}), ]); + + + public static TestGroup Sha3Inputs = new TestGroup(Isa:"Sha3", LoadIsa:"AdvSimd", + [ + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_byte", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Byte", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["NextValueOp3"] = "TestLibrary.Generator.GetByte()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_ushort", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt16", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_uint", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt32", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_ulong", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_sbyte", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "SByte", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp3"] = "TestLibrary.Generator.GetSByte()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_short", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int16", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_int", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int32", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt32()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseClearXor_long", ["Method"] = "BitwiseClearXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != (firstOp[i] ^ (secondOp[i] &~ thirdOp[i]))"}), + + (Templates.VecBinOpTest, new Dictionary { ["TestName"] = "Sha3_BitwiseRotateLeftBy1AndXor_ulong", ["Method"] = "BitwiseRotateLeftBy1AndXor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.BitwiseRotateLeftBy1AndXor(left[i], right[i])",}), + + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_byte", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Byte", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["NextValueOp3"] = "TestLibrary.Generator.GetByte()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_ushort", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt16", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_uint", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt32", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_ulong", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "UInt64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_sbyte", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "SByte", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp3"] = "TestLibrary.Generator.GetSByte()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_short", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int16", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_int", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int32", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt32()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + (Templates.VecTernOpTest, new Dictionary { ["TestName"] = "Sha3_Xor_long", ["Method"] = "Xor", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["Op3VectorType"] = "Vector128", ["Op3BaseType"] = "Int64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp3"] = "TestLibrary.Generator.GetInt16()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.Xor(firstOp[i], secondOp[i], thirdOp[i])"}), + + (Templates.VecImmBinOpTest, new Dictionary { ["TestName"] = "Sha3_XorRotateRight_ulong", ["Method"] = "XorRotateRight", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["Imm"] = "62", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["LargestVectorSize"] = "16", ["ValidateIterResult"] = "result[i] != Helpers.XorRotateRight(firstOp[i], secondOp[i], Imm)" }), + + ]); } diff --git a/src/tests/Common/GenerateHWIntrinsicTests/Arm/SveTests.cs b/src/tests/Common/GenerateHWIntrinsicTests/Arm/SveTests.cs index 3fca3eca6e6a05..e03cf691540f85 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/Arm/SveTests.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/Arm/SveTests.cs @@ -1749,4 +1749,10 @@ static class SveTests (Templates.SveVecPairBinOpTest, new Dictionary { ["TestName"] = "Sve_TransposeOdd_uint", ["Method"] = "TransposeOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateEntry"] = "result[i] != left[index * 2 + 1] || result[i + 1] != right[index * 2 + 1]"}), (Templates.SveVecPairBinOpTest, new Dictionary { ["TestName"] = "Sve_TransposeOdd_ulong", ["Method"] = "TransposeOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateEntry"] = "result[i] != left[index * 2 + 1] || result[i + 1] != right[index * 2 + 1]"}), ]); + + public static TestGroup SveSha3Inputs = new TestGroup(Isa:"SveSha3", LoadIsa:"Sve", + [ + (Templates.SveVecBinOpTest, new Dictionary { ["TestName"] = "SveSha3_BitwiseRotateLeftBy1AndXor_long", ["Method"] = "BitwiseRotateLeftBy1AndXor", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "result[i] != Helpers.BitwiseRotateLeftBy1AndXor(left[i], right[i])", ["GetIterResult"] = "Helpers.BitwiseRotateLeftBy1AndXor(left[i], right[i])"}), + (Templates.SveVecBinOpTest, new Dictionary { ["TestName"] = "SveSha3_BitwiseRotateLeftBy1AndXor_ulong", ["Method"] = "BitwiseRotateLeftBy1AndXor", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "result[i] != Helpers.BitwiseRotateLeftBy1AndXor(left[i], right[i])", ["GetIterResult"] = "Helpers.BitwiseRotateLeftBy1AndXor(left[i], right[i])"}), + ]); } diff --git a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs index dfb3fa128fd4d6..5af6607da77caa 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs @@ -106,6 +106,8 @@ static void Main(string[] args) ProcessInputs(BaseTests.Crc32Inputs); ProcessInputs(SveTests.SveInputs); ProcessInputs(Sve2Tests.Sve2Inputs); + ProcessInputs(AdvSimdTests.Sha3Inputs); + ProcessInputs(SveTests.SveSha3Inputs); void ProcessInputs(TestGroup testGroup) { diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs new file mode 100644 index 00000000000000..99a8aea7e637e3 --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs @@ -0,0 +1,16 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System; +using System.Collections.Generic; + +namespace JIT.HardwareIntrinsics.Arm._Sha3 +{ + public static partial class Program + { + static Program() + { + JIT.HardwareIntrinsics.Arm.Program.PrintSupportedIsa(); + } + } +} diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_r.csproj b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_r.csproj new file mode 100644 index 00000000000000..8e825693331e1a --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_r.csproj @@ -0,0 +1,14 @@ + + + true + + + Embedded + + + + + + + + diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_ro.csproj b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_ro.csproj new file mode 100644 index 00000000000000..da7ec1c13f43d0 --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Sha3_ro.csproj @@ -0,0 +1,14 @@ + + + true + + + Embedded + True + + + + + + + diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs index 52589b3c069dcd..23528d815967f1 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs @@ -8446,5 +8446,13 @@ public static ulong FusedAddRoundedHalving(ulong op1, ulong op2) return sum; } + + private static ulong RotateLeft1(ulong op) => (op << 1) | (op >> 63); + + public static ulong BitwiseRotateLeftBy1AndXor(ulong op1, ulong op2) + => op1 ^ RotateLeft1(op2); + + public static long BitwiseRotateLeftBy1AndXor(long op1, long op2) + => op1 ^ unchecked((long)RotateLeft1((ulong)op2)); } } diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Program.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Program.cs index 0fbde7611d064f..378f0d6f2b0cbe 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Program.cs +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Shared/Program.cs @@ -23,6 +23,8 @@ public static void PrintSupportedIsa() TestLibrary.TestFramework.LogInformation($" Sha256: {Sha256.IsSupported}"); TestLibrary.TestFramework.LogInformation($" Sve: {Sve.IsSupported}"); TestLibrary.TestFramework.LogInformation($" Sve2: {Sve2.IsSupported}"); + TestLibrary.TestFramework.LogInformation($" Sha3: {Sha3.IsSupported}"); + TestLibrary.TestFramework.LogInformation($" SveSha3: {SveSha3.IsSupported}"); TestLibrary.TestFramework.LogInformation(string.Empty); } } diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs new file mode 100644 index 00000000000000..8cf6e1f88969c9 --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs @@ -0,0 +1,16 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System; +using System.Collections.Generic; + +namespace JIT.HardwareIntrinsics.Arm._SveSha3 +{ + public static partial class Program + { + static Program() + { + JIT.HardwareIntrinsics.Arm.Program.PrintSupportedIsa(); + } + } +} diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_r.csproj b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_r.csproj new file mode 100644 index 00000000000000..e78c4e4e53975b --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_r.csproj @@ -0,0 +1,14 @@ + + + true + + + Embedded + + + + + + + + diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_ro.csproj b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_ro.csproj new file mode 100644 index 00000000000000..70835b66ee5bf4 --- /dev/null +++ b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/SveSha3_ro.csproj @@ -0,0 +1,14 @@ + + + true + + + Embedded + True + + + + + + + From 6aba4aea38902b623f2e640ad1c5bca2d6335ca3 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Mon, 20 Apr 2026 09:55:27 +0100 Subject: [PATCH 02/15] Remove semicolon --- .../System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs index 5051bd98e1a5b6..e25a2a03d25cbb 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs @@ -121,7 +121,7 @@ internal Arm64() { } /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); }; + public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) From a82a58659447bd3b4f747889172c52d591a6cada Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Mon, 20 Apr 2026 10:03:43 +0100 Subject: [PATCH 03/15] remove unsafe --- .../Arm/Sha3.PlatformNotSupported.cs | 36 +++++++++---------- .../src/System/Runtime/Intrinsics/Arm/Sha3.cs | 36 +++++++++---------- .../Arm/SveSha3.PlatformNotSupported.cs | 4 +-- .../System/Runtime/Intrinsics/Arm/SveSha3.cs | 4 +-- .../ref/System.Runtime.Intrinsics.cs | 36 +++++++++---------- 5 files changed, 58 insertions(+), 58 deletions(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs index e25a2a03d25cbb..7b0aa389e22a51 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs @@ -37,49 +37,49 @@ internal Arm64() { } /// uint8x16_t vbcaxq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// int16x8_t vbcaxq_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// int32x4_t vbcaxq_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// int64x2_t vbcaxq_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// int8x16_t vbcaxq_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// uint16x8_t vbcaxq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// uint32x4_t vbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } /// /// uint64x2_t vbcaxq_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) { throw new PlatformNotSupportedException(); } // Rotate and Exclusive OR @@ -88,7 +88,7 @@ internal Arm64() { } /// uint64x2_t vrax1q_u64(uint64x2_t a, uint64x2_t b) /// RAX1 Vd.2D,Vn.2D,Vm.2D /// - public static unsafe Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) { throw new PlatformNotSupportedException(); } + public static Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) { throw new PlatformNotSupportedException(); } // Three-way Exclusive OR performs @@ -97,49 +97,49 @@ internal Arm64() { } /// uint8x16_t veor3q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// int16x8_t veor3q_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// int32x4_t veor3q_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// int64x2_t veor3q_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// uint32x4_t veor3q_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } /// /// uint64x2_t veor3q_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) { throw new PlatformNotSupportedException(); } // Exclusive OR and Rotate @@ -148,7 +148,7 @@ internal Arm64() { } /// uint64x2_t vxarq_u64(uint64x2_t a, uint64x2_t b, const int imm6) /// XAR Vd.2D,Vn.2D,Vm.2D,imm6 /// - public static unsafe Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) { throw new PlatformNotSupportedException(); } + public static Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) { throw new PlatformNotSupportedException(); } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs index 99a091c4a039a4..5615b740834cec 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs @@ -37,49 +37,49 @@ internal Arm64() { } /// uint8x16_t vbcaxq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int16x8_t vbcaxq_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int32x4_t vbcaxq_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int64x2_t vbcaxq_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int8x16_t vbcaxq_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint16x8_t vbcaxq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint32x4_t vbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint64x2_t vbcaxq_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); // Rotate and Exclusive OR @@ -88,7 +88,7 @@ internal Arm64() { } /// uint64x2_t vrax1q_u64(uint64x2_t a, uint64x2_t b) /// RAX1 Vd.2D,Vn.2D,Vm.2D /// - public static unsafe Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + public static Sm4Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); // Three-way Exclusive OR performs @@ -97,49 +97,49 @@ internal Arm64() { } /// uint8x16_t veor3q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int16x8_t veor3q_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int32x4_t veor3q_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int64x2_t veor3q_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint32x4_t veor3q_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint64x2_t veor3q_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static unsafe Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); // Exclusive OR and Rotate @@ -148,7 +148,7 @@ internal Arm64() { } /// uint64x2_t vxarq_u64(uint64x2_t a, uint64x2_t b, const int imm6) /// XAR Vd.2D,Vn.2D,Vm.2D,imm6 /// - public static unsafe Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) => XorRotateRight(left, right, count); + public static Sm4Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) => XorRotateRight(left, right, count); } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs index 728f3095a1d88a..4584637c35fe4c 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs @@ -36,13 +36,13 @@ internal Arm64() { } /// svint64_t svrax1[_s64](svint64_t op1, svint64_t op2) /// RAX1 Zresult.D, Zop1.D, Zop2.D /// - public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } + public static Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } /// /// svuint64_t svrax1[_u64](svuint64_t op1, svuint64_t op2) /// RAX1 Zresult.D, Zop1.D, Zop2.D /// - public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } + public static Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs index de30c3a3e268a0..e463fa4b9ff8b6 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs @@ -37,12 +37,12 @@ internal Arm64() { } /// svint64_t svrax1[_s64](svint64_t op1, svint64_t op2) /// RAX1 Zresult.D, Zop1.D, Zop2.D /// - public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + public static Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); /// /// svuint64_t svrax1[_u64](svuint64_t op1, svuint64_t op2) /// RAX1 Zresult.D, Zop1.D, Zop2.D /// - public static unsafe Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + public static Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); } } diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index f5444338adf557..b948bffb6aa3db 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -8147,24 +8147,24 @@ public abstract partial class Sha3 : System.Runtime.Intrinsics.Arm.ArmBase { internal Sha3() { } public static new bool IsSupported { get { throw null; } } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 BitwiseRotateLeftBy1AndXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 rol1) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } - public static unsafe System.Runtime.Intrinsics.Vector128 XorRotateRight(System.Runtime.Intrinsics.Vector128 left, System.Runtime.Intrinsics.Vector128 right, [ConstantExpected] byte count) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseClearXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 value, System.Runtime.Intrinsics.Vector128 mask) { throw null; } + public static System.Runtime.Intrinsics.Vector128 BitwiseRotateLeftBy1AndXor(System.Runtime.Intrinsics.Vector128 xor, System.Runtime.Intrinsics.Vector128 rol1) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 Xor(System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3) { throw null; } + public static System.Runtime.Intrinsics.Vector128 XorRotateRight(System.Runtime.Intrinsics.Vector128 left, System.Runtime.Intrinsics.Vector128 right, [ConstantExpected] byte count) { throw null; } public new abstract partial class Arm64 : System.Runtime.Intrinsics.Arm.ArmBase.Arm64 { internal Arm64() { } From 3e1cd66518ebcaefd003152d8012ed0207e3c9bc Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Mon, 11 May 2026 14:41:19 +0100 Subject: [PATCH 04/15] Fix Sha3.cs typos --- .../src/System/Runtime/Intrinsics/Arm/Sha3.cs | 36 +++++++++---------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs index 5615b740834cec..1ce153ccbc6c98 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.cs @@ -37,49 +37,49 @@ internal Arm64() { } /// uint8x16_t vbcaxq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int16x8_t vbcaxq_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int32x4_t vbcaxq_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int64x2_t vbcaxq_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// int8x16_t vbcaxq_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint16x8_t vbcaxq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint32x4_t vbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); /// /// uint64x2_t vbcaxq_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); + public static Vector128 BitwiseClearXor(Vector128 xor, Vector128 value, Vector128 mask) => BitwiseClearXor(xor, value, mask); // Rotate and Exclusive OR @@ -88,7 +88,7 @@ internal Arm64() { } /// uint64x2_t vrax1q_u64(uint64x2_t a, uint64x2_t b) /// RAX1 Vd.2D,Vn.2D,Vm.2D /// - public static Sm4Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); + public static Vector128 BitwiseRotateLeftBy1AndXor(Vector128 xor, Vector128 rol1) => BitwiseRotateLeftBy1AndXor(xor, rol1); // Three-way Exclusive OR performs @@ -97,49 +97,49 @@ internal Arm64() { } /// uint8x16_t veor3q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int16x8_t veor3q_s16(int16x8_t a, int16x8_t b, int16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int32x4_t veor3q_s32(int32x4_t a, int32x4_t b, int32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int64x2_t veor3q_s64(int64x2_t a, int64x2_t b, int64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// int8x16_t veor3q_s8(int8x16_t a, int8x16_t b, int8x16_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint16x8_t veor3q_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint32x4_t veor3q_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); /// /// uint64x2_t veor3q_u64(uint64x2_t a, uint64x2_t b, uint64x2_t c) /// EOR3 Vd.16B,Vn.16B,Vm.16B,Va.16B /// - public static Sm4Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); + public static Vector128 Xor(Vector128 value1, Vector128 value2, Vector128 value3) => Xor(value1, value2, value3); // Exclusive OR and Rotate @@ -148,7 +148,7 @@ internal Arm64() { } /// uint64x2_t vxarq_u64(uint64x2_t a, uint64x2_t b, const int imm6) /// XAR Vd.2D,Vn.2D,Vm.2D,imm6 /// - public static Sm4Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) => XorRotateRight(left, right, count); + public static Vector128 XorRotateRight(Vector128 left, Vector128 right, [ConstantExpected] byte count) => XorRotateRight(left, right, count); } } From de44a1fd2b5c83ad4bffc121d004ac4a46b473cd Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Mon, 11 May 2026 15:40:48 +0100 Subject: [PATCH 05/15] Add header --- .../Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs index 4584637c35fe4c..3225558045d4a7 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs @@ -2,6 +2,7 @@ // The .NET Foundation licenses this file to you under the MIT license. using System.Runtime.CompilerServices; +using System.Numerics; namespace System.Runtime.Intrinsics.Arm { @@ -43,6 +44,5 @@ internal Arm64() { } /// RAX1 Zresult.D, Zop1.D, Zop2.D /// public static Vector BitwiseRotateLeftBy1AndXor(Vector xor, Vector rol1) { throw new PlatformNotSupportedException(); } - } } From ade015e20133ba58286d5d0a861031ce96f44b1e Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 10:23:33 +0100 Subject: [PATCH 06/15] change simd sizes to 16 --- src/coreclr/jit/hwintrinsiclistarm64.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 144cfb9613f283..b07e812a38860a 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -881,10 +881,10 @@ HARDWARE_INTRINSIC(Sha256, ScheduleUpdate1, // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** // Sha3 #define FIRST_NI_Sha3 NI_Sha3_BitwiseClearXor -HARDWARE_INTRINSIC(Sha3, BitwiseClearXor, -1, 3, {INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(Sha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) -HARDWARE_INTRINSIC(Sha3, Xor, -1, 3, {INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(Sha3, XorRotateRight, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xar, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_HasImmediateOperand) +HARDWARE_INTRINSIC(Sha3, BitwiseClearXor, 16, 3, {INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_bcax, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(Sha3, BitwiseRotateLeftBy1AndXor, 16, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) +HARDWARE_INTRINSIC(Sha3, Xor, 16, 3, {INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_eor3, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) +HARDWARE_INTRINSIC(Sha3, XorRotateRight, 16, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_xar, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_HasImmediateOperand) #define LAST_NI_Sha3 NI_Sha3_XorRotateRight From 067c8a8cd35f6489d111ace51fdc0a80c0845b25 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 10:26:00 +0100 Subject: [PATCH 07/15] Use SVE instruction --- src/coreclr/jit/hwintrinsiclistarm64sve.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 5ec4bea0330b03..78871a6959e066 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -525,7 +525,7 @@ HARDWARE_INTRINSIC(Sve2, XorRotateRight, // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** // Sha3 #define FIRST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor -HARDWARE_INTRINSIC(SveSha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_rax1, INS_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) +HARDWARE_INTRINSIC(SveSha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_rax1, INS_sve_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) #define LAST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** From 172c0677d2a903fc10d3a1b567023c0db879a972 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 11:52:19 +0100 Subject: [PATCH 08/15] Fix PlatformNotSupported files --- .../Intrinsics/Arm/Sha3.PlatformNotSupported.cs | 7 ++----- .../Intrinsics/Arm/Sve2.PlatformNotSupported.cs | 16 ++++++++++------ .../Arm/SveSha3.PlatformNotSupported.cs | 7 +++---- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs index 7b0aa389e22a51..980e69999ac8b2 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs @@ -1,13 +1,11 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. -using System.Diagnostics.CodeAnalysis; using System.Runtime.CompilerServices; namespace System.Runtime.Intrinsics.Arm { /// Provides access to the ARM Sha3 hardware instructions via intrinsics. - [Intrinsic] [CLSCompliant(false)] public abstract class Sha3 : ArmBase { @@ -16,10 +14,9 @@ internal Sha3() { } /// Gets a value that indicates whether the APIs in this class are supported. /// if the APIs are supported; otherwise, . /// A value of indicates that the APIs will throw . - public static new bool IsSupported { get => IsSupported; } + public static new bool IsSupported { [Intrinsic] get => false; } /// Provides access to the ARM Sha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. - [Intrinsic] public new abstract class Arm64 : ArmBase.Arm64 { internal Arm64() { } @@ -27,7 +24,7 @@ internal Arm64() { } /// Gets a value that indicates whether the APIs in this class are supported. /// if the APIs are supported; otherwise, . /// A value of indicates that the APIs will throw . - public static new bool IsSupported { get => IsSupported; } + public static new bool IsSupported { [Intrinsic] get { return false; } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs index fa0c9888f1a79b..d7d116b139716d 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs @@ -8,24 +8,28 @@ namespace System.Runtime.Intrinsics.Arm { - /// - /// This class provides access to the ARM SVE hardware instructions via intrinsics + /// Provides access to the ARM SVE2 hardware instructions via intrinsics /// - [Intrinsic] [CLSCompliant(false)] [Experimental(Experimentals.ArmSveDiagId, UrlFormat = Experimentals.SharedUrlFormat)] public abstract class Sve2 : Sve { internal Sve2() { } - public static new bool IsSupported { get => IsSupported; } + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { [Intrinsic] get => false; } - [Intrinsic] + /// Provides access to the ARM SVE2 hardware instructions, that are only available to 64-bit processes, via intrinsics. public new abstract class Arm64 : Sve.Arm64 { internal Arm64() { } - public static new bool IsSupported { get => IsSupported; } + /// Gets a value that indicates whether the APIs in this class are supported. + /// if the APIs are supported; otherwise, . + /// A value of indicates that the APIs will throw . + public static new bool IsSupported { [Intrinsic] get { return false; } } } diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs index 3225558045d4a7..c3be7fff2ca4d7 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs @@ -7,8 +7,8 @@ namespace System.Runtime.Intrinsics.Arm { /// Provides access to the ARM SveSha3 hardware instructions via intrinsics. - [Intrinsic] [CLSCompliant(false)] + [Experimental(Experimentals.ArmSveDiagId, UrlFormat = Experimentals.SharedUrlFormat)] public abstract class SveSha3 : ArmBase { internal SveSha3() { } @@ -16,10 +16,9 @@ internal SveSha3() { } /// Gets a value that indicates whether the APIs in this class are supported. /// if the APIs are supported; otherwise, . /// A value of indicates that the APIs will throw . - public static new bool IsSupported { get => IsSupported; } + public static new bool IsSupported { [Intrinsic] get => false; } /// Provides access to the ARM SveSha3 hardware instructions, that are only available to 64-bit processes, via intrinsics. - [Intrinsic] public new abstract class Arm64 : ArmBase.Arm64 { internal Arm64() { } @@ -27,7 +26,7 @@ internal Arm64() { } /// Gets a value that indicates whether the APIs in this class are supported. /// if the APIs are supported; otherwise, . /// A value of indicates that the APIs will throw . - public static new bool IsSupported { get => IsSupported; } + public static new bool IsSupported { [Intrinsic] get { return false; } } } From 48926be7b0f875d7160714b03307ca710e54d55e Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 12:40:14 +0100 Subject: [PATCH 09/15] Remove unused using --- src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs | 3 --- .../JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs | 3 --- 2 files changed, 6 deletions(-) diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs index 99a8aea7e637e3..b79389a224828b 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs +++ b/src/tests/JIT/HardwareIntrinsics/Arm/Sha3/Program.Sha3.cs @@ -1,9 +1,6 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. -using System; -using System.Collections.Generic; - namespace JIT.HardwareIntrinsics.Arm._Sha3 { public static partial class Program diff --git a/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs index 8cf6e1f88969c9..fb62f7beb4e176 100644 --- a/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs +++ b/src/tests/JIT/HardwareIntrinsics/Arm/SveSha3/Program.SveSha3.cs @@ -1,9 +1,6 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. -using System; -using System.Collections.Generic; - namespace JIT.HardwareIntrinsics.Arm._SveSha3 { public static partial class Program From 9acdeed5bf105ee1b333313efa958c1ecf35884d Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 14:49:07 +0100 Subject: [PATCH 10/15] Add header --- .../System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs index 980e69999ac8b2..4ce3ef98892fce 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sha3.PlatformNotSupported.cs @@ -1,6 +1,7 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. +using System.Diagnostics.CodeAnalysis; using System.Runtime.CompilerServices; namespace System.Runtime.Intrinsics.Arm From 8bae42b2ee4a5235b0a8213fcd9f929f80d7ddab Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 14:58:15 +0100 Subject: [PATCH 11/15] Add special codegen for NI_SveSha3_BitwiseRotateLeftBy1AndXor --- src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 7 +++++++ src/coreclr/jit/hwintrinsiclistarm64sve.h | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 6ca57ce2bdfe6c..e2da6301b5ec8f 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -3127,6 +3127,13 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) break; } + case NI_SveSha3_BitwiseRotateLeftBy1AndXor: + { + opt = INS_OPTS_SCALABLE_D; + GetEmitter()->emitInsSve_R_R_R(ins, emitSize, targetReg, op1Reg, op2Reg, opt); + break; + } + default: unreached(); } diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 78871a6959e066..3a8d696be343f4 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -525,7 +525,7 @@ HARDWARE_INTRINSIC(Sve2, XorRotateRight, // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** // Sha3 #define FIRST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor -HARDWARE_INTRINSIC(SveSha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_rax1, INS_sve_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_NoFlag) +HARDWARE_INTRINSIC(SveSha3, BitwiseRotateLeftBy1AndXor, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_rax1, INS_sve_rax1, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_SpecialCodeGen) #define LAST_NI_SveSha3 NI_SveSha3_BitwiseRotateLeftBy1AndXor // *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** From 42a9176297bd15466392756ea3ba169581ed0ac4 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Wed, 17 Jun 2026 15:37:38 +0100 Subject: [PATCH 12/15] fix SveSha3 cs files --- .../Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs | 3 ++- .../src/System/Runtime/Intrinsics/Arm/SveSha3.cs | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs index c3be7fff2ca4d7..23c379b074e6d5 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.PlatformNotSupported.cs @@ -1,8 +1,9 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. -using System.Runtime.CompilerServices; +using System.Diagnostics.CodeAnalysis; using System.Numerics; +using System.Runtime.CompilerServices; namespace System.Runtime.Intrinsics.Arm { diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs index e463fa4b9ff8b6..903d96b11fcac8 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/SveSha3.cs @@ -1,14 +1,16 @@ // Licensed to the .NET Foundation under one or more agreements. // The .NET Foundation licenses this file to you under the MIT license. -using System.Runtime.CompilerServices; +using System.Diagnostics.CodeAnalysis; using System.Numerics; +using System.Runtime.CompilerServices; namespace System.Runtime.Intrinsics.Arm { /// Provides access to the ARM SveSha3 hardware instructions via intrinsics. [Intrinsic] [CLSCompliant(false)] + [Experimental(Experimentals.ArmSveDiagId, UrlFormat = Experimentals.SharedUrlFormat)] public abstract class SveSha3 : ArmBase { internal SveSha3() { } From 92e3c1f5e617b4b6b54ff2e38d64e11183fee933 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Thu, 18 Jun 2026 07:50:59 +0100 Subject: [PATCH 13/15] Add CompatibilitySuppressions --- .../CompatibilitySuppressions.xml | 10 ++- .../src/CompatibilitySuppressions.xml | 70 ++++++++++++++----- .../src/CompatibilitySuppressions.xml | 3 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 4 +- .../ApiCompatBaseline.netstandard2.0.xml | 2 +- .../ApiCompatBaseline.netstandard2.1.xml | 14 ++-- 9 files changed, 74 insertions(+), 35 deletions(-) diff --git a/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml b/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml index 141210a166bc8f..8572fcb5d8d6c5 100644 --- a/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml +++ b/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + @@ -29,4 +29,10 @@ CP0008 T:System.Collections.BitArray - + + CP0016 + T:System.Runtime.Intrinsics.Arm.SveSha3:[T:System.Diagnostics.CodeAnalysis.ExperimentalAttribute] + ref/net11.0/System.Private.CoreLib.dll + lib/net11.0/System.Private.CoreLib.dll + + \ No newline at end of file diff --git a/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml b/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml index b85912e6cf1ff0..4a2bb9b4fb514a 100644 --- a/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml +++ b/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml @@ -1,6 +1,10 @@ - + + + CP0001 + T:Internal.Console + CP0001 T:Internal.Metadata.NativeFormat.ArraySignature @@ -53,14 +57,6 @@ CP0001 T:Internal.Metadata.NativeFormat.ConstantBooleanValueHandle - - CP0001 - T:Internal.Metadata.NativeFormat.ConstantEnumValue - - - CP0001 - T:Internal.Metadata.NativeFormat.ConstantEnumValueHandle - CP0001 T:Internal.Metadata.NativeFormat.ConstantByteArray @@ -117,6 +113,14 @@ CP0001 T:Internal.Metadata.NativeFormat.ConstantEnumArrayHandle + + CP0001 + T:Internal.Metadata.NativeFormat.ConstantEnumValue + + + CP0001 + T:Internal.Metadata.NativeFormat.ConstantEnumValueHandle + CP0001 T:Internal.Metadata.NativeFormat.ConstantHandleArray @@ -653,6 +657,10 @@ CP0001 T:Internal.Metadata.NativeFormat.UInt64Collection + + CP0001 + T:Internal.NativeFormat.TypeHashingAlgorithms + CP0001 T:Internal.Reflection.Core.AssemblyBinder @@ -725,6 +733,10 @@ CP0001 T:Internal.TypeSystem.LockFreeReaderHashtable`2 + + CP0001 + T:Internal.TypeSystem.LockFreeReaderHashtableOfPointers`2 + CP0001 T:System.Diagnostics.DebugAnnotations @@ -735,11 +747,11 @@ CP0001 - T:System.MDArray + T:System.FieldHandleInfo CP0001 - T:System.FieldHandleInfo + T:System.MDArray CP0001 @@ -806,8 +818,16 @@ T:System.Runtime.CompilerServices.StaticClassConstructionContext - CP0001 - T:Internal.TypeSystem.LockFreeReaderHashtableOfPointers`2 + CP0002 + F:System.Resources.ResourceManager.BaseNameField + + + CP0002 + F:System.Resources.ResourceSet.Reader + + + CP0002 + M:System.Diagnostics.DiagnosticMethodInfo.#ctor(System.String,System.String,System.String) CP0002 @@ -815,14 +835,28 @@ CP0002 - M:System.Threading.Lock.#ctor(System.Boolean) + M:System.String.Trim(System.ReadOnlySpan{System.Char}) CP0002 - M:System.Diagnostics.DiagnosticMethodInfo.#ctor(System.String,System.String,System.String) + M:System.String.TrimEnd(System.ReadOnlySpan{System.Char}) - CP0001 - T:Internal.NativeFormat.TypeHashingAlgorithms + CP0002 + M:System.String.TrimStart(System.ReadOnlySpan{System.Char}) + + + CP0002 + M:System.Threading.Lock.#ctor(System.Boolean) + + + CP0008 + T:System.Collections.BitArray + + + CP0016 + T:System.Runtime.Intrinsics.Arm.SveSha3:[T:System.Diagnostics.CodeAnalysis.ExperimentalAttribute] + ref/net11.0/System.Private.CoreLib.dll + lib/net11.0/System.Private.CoreLib.dll - + \ No newline at end of file diff --git a/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml b/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml index d6c64b01d2cd7a..9ca61f831d39df 100644 --- a/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml @@ -1,7 +1,6 @@ - + - CP0001 T:System.Collections.Specialized.ListDictionary.DictionaryNode diff --git a/src/libraries/System.Collections/src/CompatibilitySuppressions.xml b/src/libraries/System.Collections/src/CompatibilitySuppressions.xml index 52276bd955eb14..bac766f06ed6b5 100644 --- a/src/libraries/System.Collections/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Collections/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml b/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml index 739e336d8b4cad..02d0150a0d431b 100644 --- a/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml b/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml index da3c19b3810459..7d38f8a49e7657 100644 --- a/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml b/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml index 8d6cd745858ae4..d4d76a349c60bd 100644 --- a/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + @@ -13,4 +13,4 @@ CP0002 M:System.Runtime.Serialization.SerializationInfo.StartDeserialization - + \ No newline at end of file diff --git a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml index 8d18b718a612ae..58e36094f3a33e 100644 --- a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml +++ b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml index a11fe6cb50a601..aa2b07af6a40f9 100644 --- a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml +++ b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml @@ -1,4 +1,4 @@ - + @@ -853,6 +853,12 @@ netstandard2.1/netstandard.dll net11.0/netstandard.dll + + CP0015 + T:System.Diagnostics.CodeAnalysis.ExcludeFromCodeCoverageAttribute:[T:System.AttributeUsageAttribute] + netstandard2.1/netstandard.dll + net11.0/netstandard.dll + CP0015 T:System.Runtime.CompilerServices.AsyncMethodBuilderAttribute:[T:System.AttributeUsageAttribute] @@ -1003,10 +1009,4 @@ netstandard2.1/netstandard.dll net11.0/netstandard.dll - - CP0015 - T:System.Diagnostics.CodeAnalysis.ExcludeFromCodeCoverageAttribute:[T:System.AttributeUsageAttribute] - netstandard2.1/netstandard.dll - net11.0/netstandard.dll - \ No newline at end of file From 2dc2f8ea962a7c778bec34b5e33b7134a05e8d67 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Thu, 18 Jun 2026 08:51:03 +0100 Subject: [PATCH 14/15] Revert "Add CompatibilitySuppressions" This reverts commit 92e3c1f5e617b4b6b54ff2e38d64e11183fee933. --- .../CompatibilitySuppressions.xml | 10 +-- .../src/CompatibilitySuppressions.xml | 70 +++++-------------- .../src/CompatibilitySuppressions.xml | 3 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 2 +- .../src/CompatibilitySuppressions.xml | 4 +- .../ApiCompatBaseline.netstandard2.0.xml | 2 +- .../ApiCompatBaseline.netstandard2.1.xml | 14 ++-- 9 files changed, 35 insertions(+), 74 deletions(-) diff --git a/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml b/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml index 8572fcb5d8d6c5..141210a166bc8f 100644 --- a/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml +++ b/src/coreclr/System.Private.CoreLib/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + @@ -29,10 +29,4 @@ CP0008 T:System.Collections.BitArray - - CP0016 - T:System.Runtime.Intrinsics.Arm.SveSha3:[T:System.Diagnostics.CodeAnalysis.ExperimentalAttribute] - ref/net11.0/System.Private.CoreLib.dll - lib/net11.0/System.Private.CoreLib.dll - - \ No newline at end of file + diff --git a/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml b/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml index 4a2bb9b4fb514a..b85912e6cf1ff0 100644 --- a/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml +++ b/src/coreclr/nativeaot/System.Private.CoreLib/src/CompatibilitySuppressions.xml @@ -1,10 +1,6 @@ - + - - CP0001 - T:Internal.Console - CP0001 T:Internal.Metadata.NativeFormat.ArraySignature @@ -57,6 +53,14 @@ CP0001 T:Internal.Metadata.NativeFormat.ConstantBooleanValueHandle + + CP0001 + T:Internal.Metadata.NativeFormat.ConstantEnumValue + + + CP0001 + T:Internal.Metadata.NativeFormat.ConstantEnumValueHandle + CP0001 T:Internal.Metadata.NativeFormat.ConstantByteArray @@ -113,14 +117,6 @@ CP0001 T:Internal.Metadata.NativeFormat.ConstantEnumArrayHandle - - CP0001 - T:Internal.Metadata.NativeFormat.ConstantEnumValue - - - CP0001 - T:Internal.Metadata.NativeFormat.ConstantEnumValueHandle - CP0001 T:Internal.Metadata.NativeFormat.ConstantHandleArray @@ -657,10 +653,6 @@ CP0001 T:Internal.Metadata.NativeFormat.UInt64Collection - - CP0001 - T:Internal.NativeFormat.TypeHashingAlgorithms - CP0001 T:Internal.Reflection.Core.AssemblyBinder @@ -733,10 +725,6 @@ CP0001 T:Internal.TypeSystem.LockFreeReaderHashtable`2 - - CP0001 - T:Internal.TypeSystem.LockFreeReaderHashtableOfPointers`2 - CP0001 T:System.Diagnostics.DebugAnnotations @@ -747,11 +735,11 @@ CP0001 - T:System.FieldHandleInfo + T:System.MDArray CP0001 - T:System.MDArray + T:System.FieldHandleInfo CP0001 @@ -818,45 +806,23 @@ T:System.Runtime.CompilerServices.StaticClassConstructionContext - CP0002 - F:System.Resources.ResourceManager.BaseNameField - - - CP0002 - F:System.Resources.ResourceSet.Reader - - - CP0002 - M:System.Diagnostics.DiagnosticMethodInfo.#ctor(System.String,System.String,System.String) + CP0001 + T:Internal.TypeSystem.LockFreeReaderHashtableOfPointers`2 CP0002 M:System.Reflection.MethodBase.GetParametersAsSpan - - CP0002 - M:System.String.Trim(System.ReadOnlySpan{System.Char}) - - - CP0002 - M:System.String.TrimEnd(System.ReadOnlySpan{System.Char}) - - - CP0002 - M:System.String.TrimStart(System.ReadOnlySpan{System.Char}) - CP0002 M:System.Threading.Lock.#ctor(System.Boolean) - CP0008 - T:System.Collections.BitArray + CP0002 + M:System.Diagnostics.DiagnosticMethodInfo.#ctor(System.String,System.String,System.String) - CP0016 - T:System.Runtime.Intrinsics.Arm.SveSha3:[T:System.Diagnostics.CodeAnalysis.ExperimentalAttribute] - ref/net11.0/System.Private.CoreLib.dll - lib/net11.0/System.Private.CoreLib.dll + CP0001 + T:Internal.NativeFormat.TypeHashingAlgorithms - \ No newline at end of file + diff --git a/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml b/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml index 9ca61f831d39df..d6c64b01d2cd7a 100644 --- a/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Collections.Specialized/src/CompatibilitySuppressions.xml @@ -1,6 +1,7 @@ - + + CP0001 T:System.Collections.Specialized.ListDictionary.DictionaryNode diff --git a/src/libraries/System.Collections/src/CompatibilitySuppressions.xml b/src/libraries/System.Collections/src/CompatibilitySuppressions.xml index bac766f06ed6b5..52276bd955eb14 100644 --- a/src/libraries/System.Collections/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Collections/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml b/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml index 02d0150a0d431b..739e336d8b4cad 100644 --- a/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Linq.Expressions/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml b/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml index 7d38f8a49e7657..da3c19b3810459 100644 --- a/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Runtime.InteropServices/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml b/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml index d4d76a349c60bd..8d6cd745858ae4 100644 --- a/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml +++ b/src/libraries/System.Runtime/src/CompatibilitySuppressions.xml @@ -1,4 +1,4 @@ - + @@ -13,4 +13,4 @@ CP0002 M:System.Runtime.Serialization.SerializationInfo.StartDeserialization - \ No newline at end of file + diff --git a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml index 58e36094f3a33e..8d18b718a612ae 100644 --- a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml +++ b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.0.xml @@ -1,4 +1,4 @@ - + diff --git a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml index aa2b07af6a40f9..a11fe6cb50a601 100644 --- a/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml +++ b/src/libraries/apicompat/ApiCompatBaseline.netstandard2.1.xml @@ -1,4 +1,4 @@ - + @@ -853,12 +853,6 @@ netstandard2.1/netstandard.dll net11.0/netstandard.dll - - CP0015 - T:System.Diagnostics.CodeAnalysis.ExcludeFromCodeCoverageAttribute:[T:System.AttributeUsageAttribute] - netstandard2.1/netstandard.dll - net11.0/netstandard.dll - CP0015 T:System.Runtime.CompilerServices.AsyncMethodBuilderAttribute:[T:System.AttributeUsageAttribute] @@ -1009,4 +1003,10 @@ netstandard2.1/netstandard.dll net11.0/netstandard.dll + + CP0015 + T:System.Diagnostics.CodeAnalysis.ExcludeFromCodeCoverageAttribute:[T:System.AttributeUsageAttribute] + netstandard2.1/netstandard.dll + net11.0/netstandard.dll + \ No newline at end of file From 9f0c755ab0701e99545ac9e4d4857154c0a03945 Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Thu, 18 Jun 2026 08:55:31 +0100 Subject: [PATCH 15/15] Add SYSLIB5003 to intrinsics --- .../System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index 2e02cfc856701e..a42da0389bf8fc 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -7208,6 +7208,7 @@ internal Arm64() { } } } [System.CLSCompliantAttribute(false)] + [System.Diagnostics.CodeAnalysis.ExperimentalAttribute("SYSLIB5003", UrlFormat = "https://aka.ms/dotnet-warnings/{0}")] public abstract partial class SveSha3 : System.Runtime.Intrinsics.Arm.ArmBase { internal SveSha3() { }