diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4af4b08c9f387..464b1ad9ffa24 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -223,7 +223,6 @@ config ARCH_CHIP_LC823450 select ARCH_HAVE_MULTICPU select ARCH_HAVE_I2CRESET select ARCH_HAVE_CUSTOM_TESTSET - select ARCH_HAVE_CUSTOM_VECTORS ---help--- ON Semiconductor LC823450 architectures (ARM dual Cortex-M3) @@ -351,7 +350,6 @@ config ARCH_CHIP_RP2040 select ARCH_HAVE_PWM_MULTICHAN select ARCH_BOARD_COMMON select ARCH_HAVE_CUSTOM_TESTSET - select ARCH_HAVE_CUSTOM_VECTORS ---help--- Raspberry Pi RP2040 architectures (ARM dual Cortex-M0+). @@ -687,7 +685,6 @@ config ARCH_CHIP_CXD56XX select ARCH_HAVE_MATH_H select ARCH_HAVE_I2CRESET select ARCH_HAVE_CUSTOM_TESTSET - select ARCH_HAVE_CUSTOM_VECTORS select LIBC_ARCH_ATOMIC if SMP ---help--- Sony CXD56XX (ARM Cortex-M4) architectures diff --git a/arch/arm/src/armv6-m/arm_doirq.c b/arch/arm/src/armv6-m/arm_doirq.c index e3e6383e48a71..ae928c8e0e4c5 100644 --- a/arch/arm/src/armv6-m/arm_doirq.c +++ b/arch/arm/src/armv6-m/arm_doirq.c @@ -57,7 +57,7 @@ void exception_direct(void) uint32_t *arm_doirq(int irq, uint32_t *regs) { struct tcb_s **running_task = &g_running_tasks[this_cpu()]; - FAR struct tcb_s *tcb; + struct tcb_s *tcb = *running_task; /* This judgment proves that (*running_task)->xcp.regs * is invalid, and we can safely overwrite it. @@ -65,7 +65,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)) { - (*running_task)->xcp.regs = regs; + tcb->xcp.regs = regs; } board_autoled_on(LED_INIRQ); @@ -84,6 +84,12 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) irq_dispatch(irq, regs); #endif + if (tcb->sigdeliver) + { + /* Pendsv able to access running tcb with no critical section */ + + up_schedule_sigaction(tcb); + } up_irq_save(); } diff --git a/arch/arm/src/armv6-m/arm_schedulesigaction.c b/arch/arm/src/armv6-m/arm_schedulesigaction.c index 9eeda2acb31cc..9702814cdb107 100644 --- a/arch/arm/src/armv6-m/arm_schedulesigaction.c +++ b/arch/arm/src/armv6-m/arm_schedulesigaction.c @@ -37,6 +37,7 @@ #include "sched/sched.h" #include "arm_internal.h" #include "irq/irq.h" +#include "nvic.h" /**************************************************************************** * Public Functions @@ -80,14 +81,14 @@ void up_schedule_sigaction(struct tcb_s *tcb) { - sinfo("tcb=%p, rtcb=%p current_regs=%p\n", tcb, this_task(), - this_task()->xcp.regs); + struct tcb_s *rtcb = running_task(); + uint32_t ipsr = getipsr(); /* First, handle some special cases when the signal is * being delivered to the currently executing task. */ - if (tcb == this_task() && !up_interrupt_context()) + if (tcb == rtcb && ipsr == 0) { /* In this case just deliver the signal now. * REVISIT: Signal handle will run in a critical section! @@ -96,7 +97,15 @@ void up_schedule_sigaction(struct tcb_s *tcb) (tcb->sigdeliver)(tcb); tcb->sigdeliver = NULL; } - else + else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV) + { + /* Context switch should be done in pendsv, for exception directly + * last regs is not saved tcb->xcp.regs. + */ + + up_trigger_irq(NVIC_IRQ_PENDSV, 0); + } + else /* ipsr == NVIC_IRQ_PENDSV || tcb != rtcb */ { /* Save the return PC, CPSR and either the BASEPRI or PRIMASK * registers (and perhaps also the LR). These will be restored diff --git a/arch/arm/src/armv7-m/arm_doirq.c b/arch/arm/src/armv7-m/arm_doirq.c index dcbdd9dc12a8f..8313073ffb7ab 100644 --- a/arch/arm/src/armv7-m/arm_doirq.c +++ b/arch/arm/src/armv7-m/arm_doirq.c @@ -57,7 +57,7 @@ void exception_direct(void) uint32_t *arm_doirq(int irq, uint32_t *regs) { struct tcb_s **running_task = &g_running_tasks[this_cpu()]; - FAR struct tcb_s *tcb; + struct tcb_s *tcb = *running_task; /* This judgment proves that (*running_task)->xcp.regs * is invalid, and we can safely overwrite it. @@ -65,7 +65,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)) { - (*running_task)->xcp.regs = regs; + tcb->xcp.regs = regs; } board_autoled_on(LED_INIRQ); @@ -84,6 +84,12 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) irq_dispatch(irq, regs); #endif + if (tcb->sigdeliver) + { + /* Pendsv able to access running tcb with no critical section */ + + up_schedule_sigaction(tcb); + } up_irq_save(); } diff --git a/arch/arm/src/armv7-m/arm_schedulesigaction.c b/arch/arm/src/armv7-m/arm_schedulesigaction.c index 8d4749ca2a492..18252421101e7 100644 --- a/arch/arm/src/armv7-m/arm_schedulesigaction.c +++ b/arch/arm/src/armv7-m/arm_schedulesigaction.c @@ -38,6 +38,7 @@ #include "sched/sched.h" #include "arm_internal.h" #include "irq/irq.h" +#include "nvic.h" /**************************************************************************** * Public Functions @@ -81,14 +82,14 @@ void up_schedule_sigaction(struct tcb_s *tcb) { - sinfo("tcb=%p, rtcb=%p current_regs=%p\n", tcb, this_task(), - this_task()->xcp.regs); + struct tcb_s *rtcb = running_task(); + uint32_t ipsr = getipsr(); /* First, handle some special cases when the signal is * being delivered to the currently executing task. */ - if (tcb == this_task() && !up_interrupt_context()) + if (tcb == rtcb && ipsr == 0) { /* In this case just deliver the signal now. * REVISIT: Signal handle will run in a critical section! @@ -97,7 +98,15 @@ void up_schedule_sigaction(struct tcb_s *tcb) (tcb->sigdeliver)(tcb); tcb->sigdeliver = NULL; } - else + else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV) + { + /* Context switch should be done in pendsv, for exception directly + * last regs is not saved tcb->xcp.regs. + */ + + up_trigger_irq(NVIC_IRQ_PENDSV, 0); + } + else /* ipsr == NVIC_IRQ_PENDSV || tcb != rtcb */ { /* Save the return PC, CPSR and either the BASEPRI or PRIMASK * registers (and perhaps also the LR). These will be restored diff --git a/arch/arm/src/armv8-m/arm_doirq.c b/arch/arm/src/armv8-m/arm_doirq.c index 55183573a54fb..77cef0bde635f 100644 --- a/arch/arm/src/armv8-m/arm_doirq.c +++ b/arch/arm/src/armv8-m/arm_doirq.c @@ -68,7 +68,7 @@ void exception_direct(void) uint32_t *arm_doirq(int irq, uint32_t *regs) { struct tcb_s **running_task = &g_running_tasks[this_cpu()]; - FAR struct tcb_s *tcb; + struct tcb_s *tcb = *running_task; /* This judgment proves that (*running_task)->xcp.regs * is invalid, and we can safely overwrite it. @@ -76,7 +76,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)) { - (*running_task)->xcp.regs = regs; + tcb->xcp.regs = regs; } board_autoled_on(LED_INIRQ); @@ -95,6 +95,12 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) irq_dispatch(irq, regs); #endif + if (tcb->sigdeliver) + { + /* Pendsv able to access running tcb with no critical section */ + + up_schedule_sigaction(tcb); + } up_irq_save(); } diff --git a/arch/arm/src/armv8-m/arm_schedulesigaction.c b/arch/arm/src/armv8-m/arm_schedulesigaction.c index ea12ca1e488e4..2983b2470a5d3 100644 --- a/arch/arm/src/armv8-m/arm_schedulesigaction.c +++ b/arch/arm/src/armv8-m/arm_schedulesigaction.c @@ -38,6 +38,7 @@ #include "sched/sched.h" #include "arm_internal.h" #include "irq/irq.h" +#include "nvic.h" /**************************************************************************** * Public Functions @@ -81,14 +82,14 @@ void up_schedule_sigaction(struct tcb_s *tcb) { - sinfo("tcb=%p, rtcb=%p current_regs=%p\n", tcb, this_task(), - this_task()->xcp.regs); + struct tcb_s *rtcb = running_task(); + uint32_t ipsr = getipsr(); /* First, handle some special cases when the signal is * being delivered to the currently executing task. */ - if (tcb == this_task() && !up_interrupt_context()) + if (tcb == rtcb && ipsr == 0) { /* In this case just deliver the signal now. * REVISIT: Signal handle will run in a critical section! @@ -97,7 +98,15 @@ void up_schedule_sigaction(struct tcb_s *tcb) (tcb->sigdeliver)(tcb); tcb->sigdeliver = NULL; } - else + else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV) + { + /* Context switch should be done in pendsv, for exception directly + * last regs is not saved tcb->xcp.regs. + */ + + up_trigger_irq(NVIC_IRQ_PENDSV, 0); + } + else /* ipsr == NVIC_IRQ_PENDSV || tcb != rtcb */ { /* Save the return PC, CPSR and either the BASEPRI or PRIMASK * registers (and perhaps also the LR). These will be restored diff --git a/arch/arm/src/cxd56xx/CMakeLists.txt b/arch/arm/src/cxd56xx/CMakeLists.txt index be3ae081c415c..31adb76bc8371 100644 --- a/arch/arm/src/cxd56xx/CMakeLists.txt +++ b/arch/arm/src/cxd56xx/CMakeLists.txt @@ -37,8 +37,7 @@ set(SRCS cxd56_icc.c cxd56_powermgr.c cxd56_farapi.c - cxd56_sysctl.c - cxd56_vectors.c) + cxd56_sysctl.c) if(CONFIG_SMP) list(APPEND SRCS cxd56_cpuidlestack.c) diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs index fd4371897c17b..eadc9f8332a86 100644 --- a/arch/arm/src/cxd56xx/Make.defs +++ b/arch/arm/src/cxd56xx/Make.defs @@ -37,7 +37,6 @@ CHIP_CSRCS += cxd56_icc.c CHIP_CSRCS += cxd56_powermgr.c CHIP_CSRCS += cxd56_farapi.c CHIP_CSRCS += cxd56_sysctl.c -CHIP_CSRCS += cxd56_vectors.c ifeq ($(CONFIG_SMP), y) CHIP_CSRCS += cxd56_cpuidlestack.c diff --git a/arch/arm/src/cxd56xx/cxd56_vectors.c b/arch/arm/src/cxd56xx/cxd56_vectors.c deleted file mode 100644 index 1b1b42d90e365..0000000000000 --- a/arch/arm/src/cxd56xx/cxd56_vectors.c +++ /dev/null @@ -1,107 +0,0 @@ -/**************************************************************************** - * arch/arm/src/cxd56xx/cxd56_vectors.c - * - * Copyright (C) 2012 Michael Smith. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "chip.h" -#include "arm_internal.h" -#include "ram_vectors.h" -#include "nvic.h" - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/* Chip-specific entrypoint */ - -extern void __start(void); - -static void start(void) -{ - /* Zero lr to mark the end of backtrace */ - - asm volatile ("mov lr, #0\n\t" - "b __start\n\t"); -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/* Common exception entrypoint */ - -extern void exception_common(void); -extern void exception_direct(void); -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#define IDLE_STACK (_ebss + CONFIG_IDLETHREAD_STACKSIZE) - -/**************************************************************************** - * Public data - ****************************************************************************/ - -/* The cx56 use CXD56_IRQ_SMP_CALL to do SMP call. - * When sig dispatch do up_schedule_sigaction, need to make a new frame to - * run arm_sigdeliver. But the exception_direct cannot handle xcp.regs as we - * did not update the regs when c-function expection handler is called. - * - * We need to use exception_common to handle SMP call. - */ - -const void * const _vectors[] locate_data(".vectors") - aligned_data(VECTAB_ALIGN) = -{ - /* Initial stack */ - - IDLE_STACK, - - /* Reset exception handler */ - - start, - - /* Vectors 2 - n point directly at the generic handler */ - - [2 ... NVIC_IRQ_PENDSV] = &exception_common, - [NVIC_IRQ_SYSTICK ... (CXD56_IRQ_SMP_CALL - 1)] - = &exception_direct, - [CXD56_IRQ_SMP_CALL] = &exception_common, - [(CXD56_IRQ_SMP_CALL + 1) ... (15 + ARMV7M_PERIPHERAL_INTERRUPTS)] - = &exception_direct -}; diff --git a/arch/arm/src/lc823450/Make.defs b/arch/arm/src/lc823450/Make.defs index c3b756b19e2af..590e6d02e259c 100644 --- a/arch/arm/src/lc823450/Make.defs +++ b/arch/arm/src/lc823450/Make.defs @@ -22,7 +22,7 @@ include armv7-m/Make.defs CHIP_CSRCS = lc823450_allocateheap2.c lc823450_start.c lc823450_irq.c lc823450_timer.c CHIP_CSRCS += lc823450_lowputc.c lc823450_serial.c lc823450_clockconfig.c -CHIP_CSRCS += lc823450_syscontrol.c lc823450_gpio.c lc823450_vectors.c +CHIP_CSRCS += lc823450_syscontrol.c lc823450_gpio.c # Configuration-dependent LC823450 files diff --git a/arch/arm/src/lc823450/lc823450_vectors.c b/arch/arm/src/lc823450/lc823450_vectors.c deleted file mode 100644 index aa60916281a97..0000000000000 --- a/arch/arm/src/lc823450/lc823450_vectors.c +++ /dev/null @@ -1,112 +0,0 @@ -/**************************************************************************** - * arch/arm/src/lc823450/lc823450_vectors.c - * - * Copyright (C) 2012 Michael Smith. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "chip.h" -#include "arm_internal.h" -#include "ram_vectors.h" -#include "nvic.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#define IDLE_STACK (_ebss + CONFIG_IDLETHREAD_STACKSIZE) - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/* Chip-specific entrypoint */ - -extern void __start(void); - -static void start(void) -{ - /* Zero lr to mark the end of backtrace */ - - asm volatile ("mov lr, #0\n\t" - "b __start\n\t"); -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/* Common exception entrypoint */ - -extern void exception_common(void); -extern void exception_direct(void); - -/**************************************************************************** - * Public data - ****************************************************************************/ - -/* The v7m vector table consists of an array of function pointers, with the - * first slot (vector zero) used to hold the initial stack pointer. - * - * As all exceptions (interrupts) are routed via exception_common, we just - * need to fill this array with pointers to it. - * - * Note that the [ ... ] designated initializer is a GCC extension. - */ - -const void * const _vectors[] locate_data(".vectors") - aligned_data(VECTAB_ALIGN) = -{ - /* Initial stack */ - - IDLE_STACK, - - /* Reset exception handler */ - - start, - - /* Vectors 2 - n point directly at the generic handler */ - - [2 ... NVIC_IRQ_PENDSV] = &exception_common, - [(NVIC_IRQ_PENDSV + 1) ... (LC823450_IRQ_SMP_CALL_01 - 1)] - = &exception_direct, - [LC823450_IRQ_SMP_CALL_01] = &exception_common, - [(LC823450_IRQ_SMP_CALL_01 + 1) ... (LC823450_IRQ_SMP_CALL_11 - 1)] - = &exception_direct, - [LC823450_IRQ_SMP_CALL_11] = &exception_common, - [(LC823450_IRQ_SMP_CALL_11 + 1) ... (15 + ARMV7M_PERIPHERAL_INTERRUPTS)] - = &exception_direct -}; diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs index 6a1ff9baea4f9..857105f11f622 100644 --- a/arch/arm/src/rp2040/Make.defs +++ b/arch/arm/src/rp2040/Make.defs @@ -33,7 +33,6 @@ CHIP_CSRCS += rp2040_pio.c CHIP_CSRCS += rp2040_clock.c CHIP_CSRCS += rp2040_xosc.c CHIP_CSRCS += rp2040_pll.c -CHIP_CSRCS += rp2040_vectors.c ifeq ($(CONFIG_SMP),y) CHIP_CSRCS += rp2040_cpustart.c diff --git a/arch/arm/src/rp2040/rp2040_vectors.c b/arch/arm/src/rp2040/rp2040_vectors.c deleted file mode 100644 index bc15b969daffc..0000000000000 --- a/arch/arm/src/rp2040/rp2040_vectors.c +++ /dev/null @@ -1,121 +0,0 @@ -/**************************************************************************** - * arch/arm/src/rp2040/rp2040_vectors.c - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Cloned from the ARMv7-M version: - * - * Copyright (C) 2012 Michael Smith. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "chip.h" -#include "arm_internal.h" -#include "ram_vectors.h" -#include "nvic.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#define IDLE_STACK (_ebss + CONFIG_IDLETHREAD_STACKSIZE) - -#ifndef ARMV6M_PERIPHERAL_INTERRUPTS -# error ARMV6M_PERIPHERAL_INTERRUPTS must be defined to the number of I/O interrupts to be supported -#endif - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/* Chip-specific entrypoint */ - -extern void __start(void); - -static void start(void) -{ - /* Zero lr to mark the end of backtrace */ - - asm volatile ("mov lr, %0\n\t" - "bx %1\n\t" - : - : "r"(0), "r"(__start)); -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/* Common exception entrypoint */ - -extern void exception_common(void); -extern void exception_direct(void); - -/**************************************************************************** - * Public data - ****************************************************************************/ - -/* The v6m vector table consists of an array of function pointers, with the - * first slot (vector zero) used to hold the initial stack pointer. - * - * As all exceptions (interrupts) are routed via exception_common, we just - * need to fill this array with pointers to it. - * - * Note that the [ ... ] designated initializer is a GCC extension. - */ - -const void * const _vectors[] locate_data(".vectors") - aligned_data(VECTAB_ALIGN) = -{ - /* Initial stack */ - - IDLE_STACK, - - /* Reset exception handler */ - - start, - - /* Vectors 2 - n point directly at the generic handler */ - - [2 ... NVIC_IRQ_PENDSV] = &exception_common, - [(NVIC_IRQ_PENDSV + 1) ... (RP2040_SMP_CALL_PROC0 - 1)] - = &exception_direct, - [RP2040_SMP_CALL_PROC0 ... RP2040_SMP_CALL_PROC1] - = &exception_common, - [(RP2040_SMP_CALL_PROC1 + 1) ... (15 + ARMV6M_PERIPHERAL_INTERRUPTS)] - = &exception_direct, -};