From bcc5e3d29e3fba4356f8dd3222cb658bb7c5e3ee Mon Sep 17 00:00:00 2001
From: Vladimir Shiryaev <tagolog@users.noreply.github.com>
Date: Thu, 7 May 2026 13:11:08 -0700
Subject: [PATCH] [mlir][dxsa] Add dcl_tessellator_domain instruction

Example:
  dxsa.dcl_tessellator_domain domain_quad

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
---
 mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td  |  36 ++++++++++++++++++
 mlir/lib/Target/DXSA/BinaryParser.cpp         |  17 +++++++++
 .../Target/DXSA/dcl_tessellator_domain.mlir   |   7 ++++
 .../DXSA/inputs/dcl_tessellator_domain.bin    | Bin 0 -> 12 bytes
 4 files changed, 60 insertions(+)
 create mode 100644 mlir/test/Target/DXSA/dcl_tessellator_domain.mlir
 create mode 100644 mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin

diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
index a2e4e0284733..677ca28b2320 100644
--- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
+++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
@@ -51,6 +51,25 @@ def DXSA_GlobalFlagsAttr :
   let assemblyFormat = "`<` $value `>`";
 }
 
+def DXSA_TessellatorDomain_Isoline : I32EnumAttrCase<"domain_isoline", 1>;
+def DXSA_TessellatorDomain_Tri     : I32EnumAttrCase<"domain_tri",     2>;
+def DXSA_TessellatorDomain_Quad    : I32EnumAttrCase<"domain_quad",    3>;
+
+def DXSA_TessellatorDomain : I32EnumAttr<
+    "TessellatorDomain", "tessellator domain", [
+      DXSA_TessellatorDomain_Isoline,
+      DXSA_TessellatorDomain_Tri,
+      DXSA_TessellatorDomain_Quad
+    ]> {
+  let cppNamespace = "::mlir::dxsa";
+  let genSpecializedAttr = 0;
+}
+
+def DXSA_TessellatorDomainAttr :
+    EnumAttr<DXSADialect, DXSA_TessellatorDomain, "tessellator_domain"> {
+  let assemblyFormat = "$value";
+}
+
 //===----------------------------------------------------------------------===//
 // DXSA op definitions
 //===----------------------------------------------------------------------===//
@@ -196,4 +215,21 @@ def DXSA_DclOutputControlPointCount :
   let assemblyFormat = [{ $count attr-dict }];
 }
 
+def DXSA_DclTessellatorDomain : DXSA_Op<"dcl_tessellator_domain"> {
+  let summary = "declares the tessellator domain";
+  let description = [{
+    The `dxsa.dcl_tessellator_domain` operation declares the tessellator
+    domain.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_tessellator_domain domain_quad
+    ```
+  }];
+
+  let arguments = (ins DXSA_TessellatorDomainAttr:$domain);
+  let assemblyFormat = "$domain attr-dict";
+}
+
 #endif // DXSA_OPS
diff --git a/mlir/lib/Target/DXSA/BinaryParser.cpp b/mlir/lib/Target/DXSA/BinaryParser.cpp
index cdeeed28145f..4f8b809b51d6 100644
--- a/mlir/lib/Target/DXSA/BinaryParser.cpp
+++ b/mlir/lib/Target/DXSA/BinaryParser.cpp
@@ -529,6 +529,12 @@ class DXBuilder {
         builder, loc, builder.getI32IntegerAttr(count));
   }
 
+  Instruction buildDclTessellatorDomain(uint32_t domain, Location loc) {
+    auto domainAttr = dxsa::TessellatorDomainAttr::get(
+        builder.getContext(), static_cast<dxsa::TessellatorDomain>(domain));
+    return dxsa::DclTessellatorDomain::create(builder, loc, domainAttr);
+  }
+
 private:
   MLIRContext *context;
   ModuleOp module;
@@ -891,6 +897,14 @@ class Parser {
     return builder.buildDclOutputControlPointCount(count, loc);
   }
 
+  FailureOr<Instruction> parseDclTessellatorDomain(uint32_t opcodeToken,
+                                                   Location loc) {
+    auto domain = DECODE_D3D11_SB_TESS_DOMAIN(opcodeToken);
+    if (domain == D3D11_SB_TESSELLATOR_DOMAIN_UNDEFINED)
+      return emitError(getLocation(), "tessellator domain cannot be zero");
+    return builder.buildDclTessellatorDomain(domain, loc);
+  }
+
   OptionalParseResult parseDclInstruction(uint32_t opcodeToken, Location loc,
                                           Instruction &out) {
     FailureOr<Instruction> result;
@@ -907,6 +921,9 @@ class Parser {
     case D3D11_SB_OPCODE_DCL_OUTPUT_CONTROL_POINT_COUNT:
       result = parseDclOutputControlPointCount(opcodeToken, loc);
       break;
+    case D3D11_SB_OPCODE_DCL_TESS_DOMAIN:
+      result = parseDclTessellatorDomain(opcodeToken, loc);
+      break;
     default:
       return std::nullopt;
     }
diff --git a/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir b/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir
new file mode 100644
index 000000000000..6007a9f8cc72
--- /dev/null
+++ b/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir
@@ -0,0 +1,7 @@
+// RUN: mlir-translate --import-dxsa-bin %S/inputs/dcl_tessellator_domain.bin | FileCheck %s
+
+// CHECK:      module {
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_isoline
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_tri
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_quad
+// CHECK-NEXT: }
diff --git a/mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin b/mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin
new file mode 100644
index 0000000000000000000000000000000000000000..cf69df11dd8f456af9f78e83bce7972ba685f8cd
GIT binary patch
literal 12
RcmbQr!N53G0Ei_R7y%C>0rLO=

literal 0
HcmV?d00001