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kulcsaradamkulcsaradam
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Patch bugs on x64 and x86
Signed-off-by: Ádám Kulcsár <[email protected]>
1 parent fe2b760 commit 10413e5

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5 files changed

+230
-71
lines changed

5 files changed

+230
-71
lines changed

‎src/interpreter/ByteCode.cpp‎

Lines changed: 112 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -143,18 +143,21 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
143143
FOR_EACH_BYTECODE_LOAD_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
144144
FOR_EACH_BYTECODE_SIMD_LOAD_EXTEND_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
145145
FOR_EACH_BYTECODE_SIMD_LOAD_SPLAT_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
146+
FOR_EACH_BYTECODE_SIMD_ETC_MEMIDX_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
146147
#undef GENERATE_MEMORY_LOAD_CODE_CASE
147-
{
148-
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->srcOffset());
149-
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
150-
break;
151-
}
148+
case Walrus::ByteCode::V128Load32ZeroOpcode:
149+
case Walrus::ByteCode::V128Load64ZeroOpcode: {
150+
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->srcOffset());
151+
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
152+
break;
153+
}
152154

153155
#define GENERATE_SIMD_MEMORY_LOAD_CASE(name, ...) \
154156
case Walrus::ByteCode::name##Opcode:
155157
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_OP(GENERATE_SIMD_MEMORY_LOAD_CASE)
156158
#undef GENERATE_SIMD_MEMORY_LOAD_CASE
157159
{
160+
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->index());
158161
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->src0Offset());
159162
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->src1Offset());
160163
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
@@ -187,6 +190,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
187190
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_CASE)
188191
#undef GENERATE_SIMD_MEMORY_STORE_CASE
189192
{
193+
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->index());
190194
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->src0Offset());
191195
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->src1Offset());
192196
break;
@@ -196,6 +200,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
196200
FOR_EACH_BYTECODE_SIMD_EXTRACT_LANE_OP(GENERATE_SIMD_EXTRACT_LANE_CODE_CASE)
197201
#undef GENERATE_SIMD_EXTRACT_LANE_CODE_CASE
198202
{
203+
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->index());
199204
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->srcOffset());
200205
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->dstOffset());
201206
break;
@@ -205,6 +210,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
205210
FOR_EACH_BYTECODE_SIMD_REPLACE_LANE_OP(GENERATE_SIMD_REPLACE_LANE_CODE_CASE)
206211
#undef GENERATE_SIMD_REPLACE_LANE_CODE_CASE
207212
{
213+
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->index());
208214
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->srcOffsets()[0]);
209215
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->srcOffsets()[1]);
210216
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->dstOffset());
@@ -536,8 +542,6 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
536542
}
537543
break;
538544
}
539-
540-
541545
#define GENERATE_BYTECODE_OFFSET2VALUE_MEMIDX_CASE(name, ...) \
542546
case Walrus::ByteCode::name##Opcode:
543547
FOR_EACH_BYTECODE_STORE_MEMIDX_OP(GENERATE_BYTECODE_OFFSET2VALUE_MEMIDX_CASE)
@@ -558,30 +562,125 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
558562
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_OP(GENERATE_SIMD_MEMORY_LOAD_CASE)
559563
#undef GENERATE_SIMD_MEMORY_LOAD_CASE
560564
{
565+
SIMDMemoryLoad *memoryLoad = reinterpret_cast<SIMDMemoryLoad *>(const_cast<ByteCode *>(this));
566+
switch (index) {
567+
case 0: {
568+
memoryLoad->setIndex(offset);
569+
break;
570+
}
571+
case 1: {
572+
memoryLoad->setSrc0Offset(offset);
573+
break;
574+
}
575+
case 2: {
576+
memoryLoad->setSrc1Offset(offset);
577+
break;
578+
}
579+
case 3: {
580+
memoryLoad->setDstOffset(offset);
581+
break;
582+
}
583+
}
561584
break;
562585
}
563-
#define GENERATE_SIMD_MEMORY_STORE_CASE(name, ...) \
586+
#define GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE(name, ...) \
564587
case Walrus::ByteCode::name##Opcode:
565-
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_CASE)
566-
#undef GENERATE_SIMD_MEMORY_STORE_CASE
588+
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_MEMIDX_OP(GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE)
589+
#undef GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE
590+
{
591+
SIMDMemoryLoadMemIdx *memoryLoad = reinterpret_cast<SIMDMemoryLoadMemIdx *>(const_cast<ByteCode *>(this));
592+
switch (index) {
593+
case 0: {
594+
memoryLoad->setIndex(offset);
595+
break;
596+
}
597+
case 1: {
598+
memoryLoad->setSrc0Offset(offset);
599+
break;
600+
}
601+
case 2: {
602+
memoryLoad->setSrc1Offset(offset);
603+
break;
604+
}
605+
case 3: {
606+
memoryLoad->setDstOffset(offset);
607+
break;
608+
}
609+
}
610+
break;
611+
}
612+
#define GENERATE_SIMD_MEMORY_STORE_LANE_CASE(name, ...) \
613+
case Walrus::ByteCode::name##Opcode:
614+
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_LANE_CASE)
615+
#undef GENERATE_SIMD_MEMORY_STORE_LANE_CASE
616+
{
617+
SIMDMemoryStore *memoryStore = reinterpret_cast<SIMDMemoryStore *>(const_cast<ByteCode *>(this));
618+
if (index == 0) {
619+
memoryStore->setIndex(offset);
620+
} else if (index == 1) {
621+
memoryStore->setSrc0Offset(offset);
622+
} else {
623+
memoryStore->setSrc1Offset(offset);
624+
}
625+
break;
626+
}
627+
#define GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE(name, ...) \
628+
case Walrus::ByteCode::name##Opcode:
629+
FOR_EACH_BYTECODE_SIMD_STORE_LANE_MEMIDX_OP(GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE)
630+
#undef GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE
567631
{
632+
SIMDMemoryStoreMemIdx *memoryStore = reinterpret_cast<SIMDMemoryStoreMemIdx *>(const_cast<ByteCode *>(this));
633+
if (index == 0) {
634+
memoryStore->setIndex(offset);
635+
} else if (index == 1) {
636+
memoryStore->setSrc0Offset(offset);
637+
} else {
638+
memoryStore->setSrc1Offset(offset);
639+
}
568640
break;
569641
}
570642
#define GENERATE_SIMD_EXTRACT_LANE_CODE_CASE(name, ...) \
571643
case Walrus::ByteCode::name##Opcode:
572644
FOR_EACH_BYTECODE_SIMD_EXTRACT_LANE_OP(GENERATE_SIMD_EXTRACT_LANE_CODE_CASE)
573645
#undef GENERATE_SIMD_EXTRACT_LANE_CODE_CASE
574646
{
647+
SIMDExtractLane *extractLane = reinterpret_cast<SIMDExtractLane *>(const_cast<ByteCode *>(this));
648+
if (index == 0) {
649+
extractLane->setIndex(offset);
650+
} else if (index == 1) {
651+
extractLane->setSrcOffset(offset);
652+
} else {
653+
extractLane->setDstOffset(offset);
654+
}
575655
break;
576656
}
577657
#define GENERATE_SIMD_REPLACE_LANE_CODE_CASE(name, ...) \
578658
case Walrus::ByteCode::name##Opcode:
579659
FOR_EACH_BYTECODE_SIMD_REPLACE_LANE_OP(GENERATE_SIMD_REPLACE_LANE_CODE_CASE)
580660
#undef GENERATE_SIMD_REPLACE_LANE_CODE_CASE
581661
{
662+
SIMDReplaceLane *replaceLane = reinterpret_cast<SIMDReplaceLane *>(const_cast<ByteCode *>(this));
663+
664+
switch (index) {
665+
case 0: {
666+
replaceLane->setIndex(offset);
667+
break;
668+
}
669+
case 1: {
670+
replaceLane->setSrc0Offset(offset);
671+
break;
672+
}
673+
case 2: {
674+
replaceLane->setSrc1Offset(offset);
675+
break;
676+
}
677+
case 3: {
678+
replaceLane->setDstOffset(offset);
679+
break;
680+
}
681+
}
582682
break;
583683
}
584-
// Special cases that require manual handling. This list needs to be extended if new byte codes are introduced.
585684
case Walrus::ByteCode::SelectOpcode: {
586685
Walrus::Select *sel = reinterpret_cast<Walrus::Select *>(const_cast<ByteCode *>(this));
587686
switch (index) {
@@ -615,6 +714,8 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
615714
break;
616715
}
617716
case Walrus::ByteCode::MemorySizeOpcode: {
717+
MemorySize *memorySize = reinterpret_cast<Walrus::MemorySize *>(const_cast<ByteCode *>(this));
718+
memorySize->setDstOffset(offset);
618719
break;
619720
}
620721
case Walrus::ByteCode::MemoryInitOpcode: {

‎src/interpreter/ByteCode.h‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1763,6 +1763,11 @@ class MemorySize : public ByteCode {
17631763
{
17641764
}
17651765

1766+
void setDstOffset(Walrus::ByteCodeStackOffset o)
1767+
{
1768+
m_dstOffset = o;
1769+
}
1770+
17661771
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
17671772
uint16_t memIndex() const { return m_memIndex; }
17681773

@@ -1992,9 +1997,13 @@ class SIMDMemoryLoad : public ByteCode {
19921997

19931998
uint32_t offset() const { return m_offset; }
19941999
ByteCodeStackOffset index() const { return m_index; }
2000+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
19952001
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2002+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
19962003
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2004+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
19972005
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2006+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
19982007

19992008
#if !defined(NDEBUG)
20002009
void dump(size_t pos)
@@ -2026,9 +2035,13 @@ class SIMDMemoryLoadMemIdx : public ByteCode {
20262035

20272036
uint32_t offset() const { return m_offset; }
20282037
ByteCodeStackOffset index() const { return m_index; }
2038+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
20292039
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2040+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
20302041
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2042+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
20312043
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2044+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
20322045
uint16_t memIndex() const { return m_memIndex; }
20332046
uint16_t alignment() const { return m_alignment; }
20342047

@@ -2181,8 +2194,11 @@ class SIMDMemoryStore : public ByteCode {
21812194

21822195
uint32_t offset() const { return m_offset; }
21832196
ByteCodeStackOffset index() const { return m_index; }
2197+
void setIndex(Walrus::ByteCodeStackOffset o) { m_index = o; }
21842198
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2199+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
21852200
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2201+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
21862202

21872203
#if !defined(NDEBUG)
21882204
void dump(size_t pos)
@@ -2212,8 +2228,11 @@ class SIMDMemoryStoreMemIdx : public ByteCode {
22122228

22132229
uint32_t offset() const { return m_offset; }
22142230
ByteCodeStackOffset index() const { return m_index; }
2231+
void setIndex(Walrus::ByteCodeStackOffset o) { m_index = o; }
22152232
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2233+
void setSrc0Offset(Walrus::ByteCodeStackOffset o) { m_src0Offset = o; }
22162234
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2235+
void setSrc1Offset(Walrus::ByteCodeStackOffset o) { m_src1Offset = o; }
22172236
uint16_t memIndex() const { return m_memIndex; }
22182237
uint16_t alignment() const { return m_alignment; }
22192238

@@ -2243,8 +2262,11 @@ class SIMDExtractLane : public ByteCode {
22432262
}
22442263

22452264
ByteCodeStackOffset index() const { return m_index; }
2265+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
22462266
ByteCodeStackOffset srcOffset() const { return m_srcOffset; }
2267+
void setSrcOffset(ByteCodeStackOffset o) { m_srcOffset = o; }
22472268
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2269+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
22482270

22492271
#if !defined(NDEBUG)
22502272
void dump(size_t pos)
@@ -2269,8 +2291,12 @@ class SIMDReplaceLane : public ByteCode {
22692291
}
22702292

22712293
uint32_t index() const { return m_index; }
2294+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
22722295
const ByteCodeStackOffset* srcOffsets() const { return m_srcOffsets; }
2296+
void setSrc0Offset(ByteCodeStackOffset o) { m_srcOffsets[0] = o; }
2297+
void setSrc1Offset(ByteCodeStackOffset o) { m_srcOffsets[1] = o; }
22732298
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2299+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
22742300

22752301
#if !defined(NDEBUG)
22762302
void dump(size_t pos)

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