Skip to content

Commit 13852ff

Browse files
committed
Align arm64 data section as requested
Currently, the data section alignment request is ignored unless it is 8. Since the minimum is 4, this effectively means that 16-byte SIMD16 data alignment requests are ignored. This is likely because this code was written before arm64 supported SIMD, and was never revised. Cases of SIMD loads of constant data lead to larger alignment padding of the data section. This is somewhat mitigated by dotnet#71043 which fixes a bug with overallocation and overalignment of SIMD8 data loads.
1 parent 229502e commit 13852ff

1 file changed

Lines changed: 2 additions & 4 deletions

File tree

src/coreclr/jit/emit.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6330,11 +6330,9 @@ unsigned emitter::emitEndCodeGen(Compiler* comp,
63306330
}
63316331

63326332
UNATIVE_OFFSET roDataAlignmentDelta = 0;
6333-
if (emitConsDsc.dsdOffs && (emitConsDsc.alignment == TARGET_POINTER_SIZE))
6333+
if (emitConsDsc.dsdOffs > 0)
63346334
{
6335-
UNATIVE_OFFSET roDataAlignment = TARGET_POINTER_SIZE; // 8 Byte align by default.
6336-
roDataAlignmentDelta = (UNATIVE_OFFSET)ALIGN_UP(emitTotalHotCodeSize, roDataAlignment) - emitTotalHotCodeSize;
6337-
assert((roDataAlignmentDelta == 0) || (roDataAlignmentDelta == 4));
6335+
roDataAlignmentDelta = AlignmentPad(emitTotalHotCodeSize, emitConsDsc.alignment);
63386336
}
63396337

63406338
args.hotCodeSize = emitTotalHotCodeSize + roDataAlignmentDelta + emitConsDsc.dsdOffs;

0 commit comments

Comments
 (0)